Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.

Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.

Abstract: The present disclosure relates to a semiconductor device package which includes a carrier, an electronic component disposed on the carrier, and a package body disposed on the carrier and encapsulating the electronic component. A shield is disposed on the package body. The shield includes multiple non-magnetic conductive layers, multiple insulating layers and multiple magnetic conductive layers. At least one of the insulating layers is located between each non-magnetic conductive layer and a neighboring magnetic conductive layer.

Abstract: The present disclosure relates to a semiconductor device package which includes a carrier, an electronic component disposed on the carrier, and a package body disposed on the carrier and encapsulating the electronic component. A shield is disposed on the package body. The shield includes multiple non-magnetic conductive layers, multiple insulating layers and multiple magnetic conductive layers. At least one of the insulating layers is located between each non-magnetic conductive layer and a neighboring magnetic conductive layer.

Abstract: The present disclosure relates to a semiconductor device package which includes a carrier, an electronic component, conductive elements, a package body, a shield, a magnetic insulating layer, and a patterned conductive layer. The carrier has a top surface on which the electronic component is disposed. The conductive elements are disposed on the top surface of the carrier. The package body is disposed on the top surface of the carrier and encapsulates the electronic component and a portion of each of the conductive elements. The shield is disposed on the package body and covers an exterior of the package body. The magnetic insulating layer is disposed on a top surface of the shield. The patterned conductive layer is disposed on the magnetic insulating layer. Each of the conductive elements electrically connects the patterned conductive layer to the electronic component.

Abstract: A switched capacitor circuit for use in a voltage controlled oscillator (VCO) capable of minimizing clock feedthrough effect and an undesired momentary frequency drift in the VCO output frequency when the switched capacitor circuit is shut off. By gradually switching the switched capacitor circuit from an on state to an off state the clock feedthrough effect can be minimized. Several differently sized switch elements are used to selectively switch the capacitor from an internal capacitive node to ground. When switching the switched capacitor circuit to an off state, the control signals are sequenced to shut the switch elements off in order based on decreasing switch size. The smallest switch element can have a low-pass filter added to its control terminal to further decrease the clock feedthrough effect.

Abstract: A switched capacitor circuit for use in a voltage controlled oscillator (VCO) capable of minimizing clock feedthrough effect and an undesired momentary frequency drift in the VCO output frequency when the switched capacitor circuit is shut off. By gradually switching the switched capacitor circuit from an on state to an off state the clock feedthrough effect can be minimized. Several differently sized switch elements are used to selectively switch the capacitor from an internal capacitive node to ground. When switching the switched capacitor circuit to an off state, the control signals are sequenced to shut the switch elements off in order based on decreasing switch size. The smallest switch element can have a low-pass filter added to its control terminal to further decrease the clock feedthrough effect.