Patents by Inventor Ming-Jiang Zhou

Ming-Jiang Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6921957
    Abstract: A new low forward voltage drop Schottky barrier diode and its manufacturing method are provided. The method includes steps of providing a substrate, forming plural trenches on the substrate, and forming a metal layer on the substrate having plural trenches thereon to form a barrier metal layer between the substrate and the surface metal layer for forming the Schottky barrier diode.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: July 26, 2005
    Assignees: Pyramis Corporation, Delta Electronics, Inc.
    Inventors: Jun Zeng, Ming-Jiang Zhou, Tzong-Shiann Wu
  • Patent number: 6828177
    Abstract: A method for manufacturing a gate pad protection structure applied in a power semiconductor device is provided. The method includes steps of (a) forming a gate oxide layer on a substrate, (b) forming a polysilicon layer on the gate oxide layer, (c) forming a polysilicon window and a polysilicon window array on the polysilicon layer, and (d) performing an ion implantation via the polysilicon window and the polysilicon window array.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: December 7, 2004
    Assignee: Pyramis Corporation
    Inventors: Jun Zeng, Ming-Jiang Zhou, Tzong-Shiann Wu
  • Publication number: 20030155628
    Abstract: A new low forward voltage drop Schottky barrier diode and its manufacturing method are provided. The method includes steps of providing a substrate, forming plural trenches on the substrate, and forming a metal layer on the substrate having plural trenches thereon to form a barrier metal layer between the substrate and the surface metal layer for forming the Schottky barrier diode.
    Type: Application
    Filed: December 31, 2002
    Publication date: August 21, 2003
    Inventors: Jun Zeng, Ming-Jiang Zhou, Tzong-Shiann Wu
  • Publication number: 20030157753
    Abstract: A method for manufacturing a gate pad protection structure applied in a power semiconductor device is provided. The method includes steps of (a) forming a gate oxide layer on a substrate, (b) forming a polysilicon layer on the gate oxide layer, (c) forming a polysilicon window and a polysilicon window array on the polysilicon layer, and (d) performing an ion implantation via the polysilicon window and the polysilicon window array.
    Type: Application
    Filed: December 30, 2002
    Publication date: August 21, 2003
    Inventors: Jun Zeng, Ming-Jiang Zhou, Tzong-Shiann Wu