Patents by Inventor Ming-Kwang Lee

Ming-Kwang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4685196
    Abstract: An MOS transistor with a trench channel and self-aligned source and drain contacts to the interconnection layer. The MOS transistor is fabricated by first etching the substrate of monocrystalline silicon so as to form a trench channel and thereafter filling the trench channel with an anisotropic etched first polycrystalline silicon film. Buried contacts of polycrystalline silicon to the substrate, and Al-Si metallization are used. The trench structure in the channel regions permits the self-alignment of the gate element and the buried contacts to source and drain regions. The MOS transistors of the invention significantly reduce the short channel effect as observed in conventional MOS transistors.
    Type: Grant
    Filed: July 29, 1985
    Date of Patent: August 11, 1987
    Assignee: Industrial Technology Research Institute
    Inventor: Ming-Kwang Lee
  • Patent number: 4673531
    Abstract: An improved polycrystalline silicon resistor having limited lateral diffusion, integrated circuits containing such resistors, and a method of their preparation is disclosed. The polysilicon resistor is formed by first doping the polysilicon layer with a p or n type impurity and thereafter neutralizing the treated layer with impurities of the other type so as to form a device wherein the concentration gradient between the resistor region of the aforesaid layer and its environment is low. The low concentration gradient reduces lateral diffusion during manufacture, thereby permitting manufacture of integrated circuits of higher circuit density and resistors with smaller dimensions, lower temperature coefficients and higher reliability.
    Type: Grant
    Filed: May 15, 1986
    Date of Patent: June 16, 1987
    Assignee: Industrial Technology Research Institute
    Inventor: Ming-Kwang Lee
  • Patent number: 4489104
    Abstract: An improved polycrystalline silicon resistor having limited lateral diffusion, integrated circuits containing such resistors, and a method of their preparation is disclosed. The polysilicon resistor is formed by first doping the polysilicon layer with a p or n type impurity and thereafter neutralizing the treated layer with impurities of the other type so as to form a device wherein the concentration gradient between the resistor region of the aforesaid layer and its environment is low. The low concentration gradient reduces lateral diffusion during manufacture, thereby permitting manufacture of integrated circuits of higher circuit density and resistors with smaller dimensions, lower temperature coefficients and higher reliability.
    Type: Grant
    Filed: June 3, 1983
    Date of Patent: December 18, 1984
    Assignee: Industrial Technology Research Institute
    Inventor: Ming-Kwang Lee