Patents by Inventor Mingshang Tsai

Mingshang Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7524730
    Abstract: A method of fabricating a bipolar junction transistor is provided herein. An isolation structure is formed on a first conductive type substrate. A second conductive type deep well is formed in the first conductive type substrate to serve as a collector. Thereafter, a second conductive type well is formed in the substrate and then a first conductive type well is formed in the substrate to serve as a base. A buffer region is formed underneath a portion of the isolation structure and between the base and the second conductive well. The buffer region together with the isolation structure isolates the base from the second conductive type well. A second conductive type emitter and a second conductive type collector pick-up region are selectively formed on the surface of the first conductive type substrate. Thereafter, a first conductive type base pick-up region is selectively formed.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: April 28, 2009
    Assignee: United Microelectronics Corp.
    Inventor: Mingshang Tsai
  • Patent number: 7508023
    Abstract: A capacitor structure is described, including a substrate, a first metal layer in the substrate, an etching stop layer on the substrate having therein an opening that exposes a portion of the first metal layer, a connection layer on the portion of the first metal layer, the sidewall of the opening and a portion of the etching stop layer, a second metal layer over the connection layer, and an insulating layer between the second metal layer and the connection layer.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: March 24, 2009
    Assignee: United Microelectronics Corp.
    Inventor: Mingshang Tsai
  • Patent number: 7422954
    Abstract: A capacitor structure is described, including a substrate, a first metal layer in the substrate, an etching stop layer on the substrate having therein an opening that exposes a portion of the first metal layer, a connection layer on the portion of the first metal layer, the sidewall of the opening and a portion of the etching stop layer, a second metal layer over the connection layer, and an insulating layer between the second metal layer and the connection layer.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: September 9, 2008
    Assignee: United Microelectronics Corp.
    Inventor: Mingshang Tsai
  • Patent number: 7358545
    Abstract: A bipolar junction transistor is provided. A p-type well region surrounds an n-type emitter and connects with the bottom of the emitter to serve as a base. A p-type base pick-up region connects with the base and surrounds the emitter. An n-type deep well, connected to the bottom of the base and the bottom of the n-type well, is used as a collector. The n-type well surrounds the base and connects with the n-type deep well. An n-type collector pick-up region connects with the n-type well and surrounds the base. An isolation structure is disposed between the emitter and the base and between a portion of the base and a portion of the n-type well. A buffer region is disposed under a portion of the isolation structure. Furthermore, the buffer region together with a portion of the isolation structure isolates the p-type base from the n-type well.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: April 15, 2008
    Assignee: United Microelectronics Corp.
    Inventor: Mingshang Tsai
  • Publication number: 20070230089
    Abstract: A capacitor structure is described, including a substrate, a first metal layer in the substrate, an etching stop layer on the substrate having therein an opening that exposes a portion of the first metal layer, a connection layer on the portion of the first metal layer, the sidewall of the opening and a portion of the etching stop layer, a second metal layer over the connection layer, and an insulating layer between the second metal layer and the connection layer.
    Type: Application
    Filed: June 5, 2007
    Publication date: October 4, 2007
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Mingshang Tsai
  • Publication number: 20070216029
    Abstract: A capacitor structure is described, including a substrate, a first metal layer in the substrate, an etching stop layer on the substrate having therein an opening that exposes a portion of the first metal layer, a connection layer on the portion of the first metal layer, the sidewall of the opening and a portion of the etching stop layer, a second metal layer over the connection layer, and an insulating layer between the second metal layer and the connection layer.
    Type: Application
    Filed: March 14, 2006
    Publication date: September 20, 2007
    Inventor: Mingshang Tsai
  • Publication number: 20070184608
    Abstract: A method of fabricating a bipolar junction transistor is provided herein. An isolation structure is formed on a first conductive type substrate. A second conductive type deep well is formed in the first conductive type substrate to serve as a collector. Thereafter, a second conductive type well is formed in the substrate and then a first conductive type well is formed in the substrate to serve as a base. A buffer region is formed underneath a portion of the isolation structure and between the base and the second conductive well. The buffer region together with the isolation structure isolates the base from the second conductive type well. A second conductive type emitter and a second conductive type collector pick-up region are selectively formed on the surface of the first conductive type substrate. Thereafter, a first conductive type base pick-up region is selectively formed.
    Type: Application
    Filed: April 16, 2007
    Publication date: August 9, 2007
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Mingshang Tsai
  • Publication number: 20070034900
    Abstract: A bipolar junction transistor is provided. A p-type well region surrounds an n-type emitter and connects with the bottom of the emitter to serve as a base. A p-type base pick-up region connects with the base and surrounds the emitter. An n-type deep well, connected to the bottom of the base and the bottom of the n-type well, is used as a collector. The n-type well surrounds the base and connects with the n-type deep well. An n-type collector pick-up region connects with the n-type well and surrounds the base. An isolation structure is disposed between the emitter and the base and between a portion of the base and a portion of the n-type well. A buffer region is disposed under a portion of the isolation structure. Furthermore, the buffer region together with a portion of the isolation structure isolates the p-type base from the n-type well.
    Type: Application
    Filed: August 10, 2005
    Publication date: February 15, 2007
    Inventor: Mingshang Tsai