Patents by Inventor Ming-Tung Wu
Ming-Tung Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136174Abstract: In some embodiments, the present disclosure relates to an integrated chip fabrication device. The device includes a stealth laser apparatus arranged over a chuck configured to hold a substrate. An infrared camera is arranged over the chuck and configured to detect an alignment mark below the substrate. The alignment mark is used to align the stealth laser apparatus over the chuck. Control circuitry is configured to operate the stealth laser apparatus to form a stealth damage region at a location within the substrate that is determined based upon the alignment mark. The stealth damage region separates an inner region of the substrate from an outer region of the substrate.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Ming-Tung Wu, Hsun-Chung Kuang, Tung-He Chou
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Patent number: 11901171Abstract: In some embodiments, the present disclosure relates to a method that includes aligning a stealth laser apparatus over a wafer using an infrared camera coupled to the stealth laser apparatus. The stealth laser apparatus is used to form a stealth damage region within the wafer that is continuously connected around the wafer and separates an inner region from an outer region of the wafer. The stealth damage region is also arranged at a first distance from an edge of the wafer and extends from a first depth to a second depth beneath a top surface of the wafer. Further, the method includes forming a groove in the wafer to separate the outer region from the inner region of the wafer. The outer region of the wafer is removed using a blade, and a top portion of the inner region of the wafer is removed using a grinding apparatus.Type: GrantFiled: November 4, 2020Date of Patent: February 13, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Tung Wu, Hsun-Chung Kuang, Tung-He Chou
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Patent number: 11605534Abstract: In some embodiments, the present disclosure relates to method for trimming and cleaning an edge of a wafer. The method includes trimming an outer edge portion of the wafer with a blade along a continuously connected trim path to define a new sidewall of the wafer. The trimming produces contaminant particles on the wafer. Further, the method includes applying deionized water to the new sidewall of the wafer with water nozzles to remove the contaminant particles. The method also includes applying pressurized gas to the wafer at a first top surface area of the wafer with an air jet nozzle. The pressurized gas is directed outward from a center of the wafer to remove remaining contaminant particles. The applying of deionized water and the applying of pressurized gas are performed in a same chamber as the trimming.Type: GrantFiled: July 9, 2021Date of Patent: March 14, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung-He Chou, Sheng-Chau Chen, Ming-Tung Wu, Hsun-Chung Kuang
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Patent number: 11342199Abstract: A wafer carrier assembly includes a wafer carrier and a fluid passage. The wafer carrier comprises a retainer ring confining a wafer accommodation space. The fluid passage is inside the wafer carrier. The fluid passage includes an inlet and at least an outlet to dispense fluid into the wafer accommodation space.Type: GrantFiled: December 16, 2019Date of Patent: May 24, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ming-Tung Wu, Hsun-Chung Kuang
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Publication number: 20210335602Abstract: In some embodiments, the present disclosure relates to method for trimming and cleaning an edge of a wafer. The method includes trimming an outer edge portion of the wafer with a blade along a continuously connected trim path to define a new sidewall of the wafer. The trimming produces contaminant particles on the wafer. Further, the method includes applying deionized water to the new sidewall of the wafer with water nozzles to remove the contaminant particles. The method also includes applying pressurized gas to the wafer at a first top surface area of the wafer with an air jet nozzle. The pressurized gas is directed outward from a center of the wafer to remove remaining contaminant particles. The applying of deionized water and the applying of pressurized gas are performed in a same chamber as the trimming.Type: ApplicationFiled: July 9, 2021Publication date: October 28, 2021Inventors: Tung-He Chou, Sheng-Chau Chen, Ming-Tung Wu, Hsun-Chung Kuang
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Patent number: 11081334Abstract: In some embodiments, the present disclosure relates to a wafer trimming and cleaning apparatus, which includes a blade that is configured to trim a damaged edge portion of a wafer, thereby defining a new sidewall of the wafer. The wafer trimming and cleaning apparatus further includes water nozzles and an air jet nozzle. The water nozzles are configured to apply deionized water to the new sidewall of the wafer to remove contaminant particles generated by the blade. The air jet nozzle is configured to apply pressurized gas to a first top surface area of the wafer to remove the contaminant particles generated by the blade. The first top surface area overlies the new sidewall of the wafer.Type: GrantFiled: August 7, 2019Date of Patent: August 3, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung-He Chou, Sheng-Chau Chen, Ming-Tung Wu, Hsun-Chung Kuang
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Publication number: 20210193453Abstract: In some embodiments, the present disclosure relates to a method that includes aligning a stealth laser apparatus over a wafer using an infrared camera coupled to the stealth laser apparatus. The stealth laser apparatus is used to form a stealth damage region within the wafer that is continuously connected around the wafer and separates an inner region from an outer region of the wafer. The stealth damage region is also arranged at a first distance from an edge of the wafer and extends from a first depth to a second depth beneath a top surface of the wafer. Further, the method includes forming a groove in the wafer to separate the outer region from the inner region of the wafer. The outer region of the wafer is removed using a blade, and a top portion of the inner region of the wafer is removed using a grinding apparatus.Type: ApplicationFiled: November 4, 2020Publication date: June 24, 2021Inventors: Ming-Tung Wu, Hsun-Chung Kuang, Tung-He Chou
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Publication number: 20210043443Abstract: In some embodiments, the present disclosure relates to a wafer trimming and cleaning apparatus, which includes a blade that is configured to trim a damaged edge portion of a wafer, thereby defining a new sidewall of the wafer. The wafer trimming and cleaning apparatus further includes water nozzles and an air jet nozzle. The water nozzles are configured to apply deionized water to the new sidewall of the wafer to remove contaminant particles generated by the blade. The air jet nozzle is configured to apply pressurized gas to a first top surface area of the wafer to remove the contaminant particles generated by the blade. The first top surface area overlies the new sidewall of the wafer.Type: ApplicationFiled: August 7, 2019Publication date: February 11, 2021Inventors: Tung-He Chou, Sheng-Chau Chen, Ming-Tung Wu, Hsun-Chung Kuang
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Patent number: 10879077Abstract: A planarization apparatus is provided. The planarization apparatus includes a platen, and a grinding wheel. The platen is configured to support a wafer. The grinding wheel is over the platen and configured to grind the wafer. The grinding wheel includes a base ring, and a plurality of grinding teeth mounted on the base ring. The plurality of grinding teeth includes a plurality of grinding abrasives, and the plurality of grinding abrasives is ball type.Type: GrantFiled: August 16, 2018Date of Patent: December 29, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ming-Tung Wu, Chun-Kai Lan, Tung-He Chou, Hsun-Chung Kuang
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Patent number: 10857651Abstract: An apparatus for chemical mechanical polishing includes a pad conditioner. The pad conditioner includes a first disk having a first surface and a second disk having a second surface. The first surface has a first plurality of abrasives with a first mean size and the second surface has a second plurality of abrasives with a second mean size greater than the first mean size.Type: GrantFiled: March 21, 2018Date of Patent: December 8, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chun-Kai Lan, Tung-He Chou, Ming-Tung Wu, Sheng-Chau Chen, Hsun-Chung Kuang
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Publication number: 20200118842Abstract: A wafer carrier assembly includes a wafer carrier and a fluid passage. The wafer carrier comprises a retainer ring confining a wafer accommodation space. The fluid passage is inside the wafer carrier. The fluid passage includes an inlet and at least an outlet to dispense fluid into the wafer accommodation space.Type: ApplicationFiled: December 16, 2019Publication date: April 16, 2020Inventors: MING-TUNG WU, HSUN-CHUNG KUANG
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Patent number: 10510563Abstract: A wafer carrier assembly includes a wafer carrier and a fluid passage. The wafer carrier comprises a retainer ring confining a wafer accommodation space. The fluid passage is inside the wafer carrier. The fluid passage includes an inlet and at least an outlet to dispense fluid into the wafer accommodation space.Type: GrantFiled: April 15, 2016Date of Patent: December 17, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ming-Tung Wu, Hsun-Chung Kuang
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Publication number: 20190152020Abstract: An apparatus for chemical mechanical polishing includes a pad conditioner. The pad conditioner includes a first disk having a first surface and a second disk having a second surface. The first surface has a first plurality of abrasives with a first mean size and the second surface has a second plurality of abrasives with a second mean size greater than the first mean size.Type: ApplicationFiled: March 21, 2018Publication date: May 23, 2019Inventors: CHUN-KAI LAN, TUNG-HE CHOU, MING-TUNG WU, SHENG-CHAU CHEN, HSUN-CHUNG KUANG
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Publication number: 20190131148Abstract: A planarization apparatus is provided. The planarization apparatus includes a platen, and a grinding wheel. The platen is configured to support a wafer. The grinding wheel is over the platen and configured to grind the wafer. The grinding wheel includes a base ring, and a plurality of grinding teeth mounted on the base ring. The plurality of grinding teeth includes a plurality of grinding abrasives, and the plurality of grinding abrasives is ball type.Type: ApplicationFiled: August 16, 2018Publication date: May 2, 2019Inventors: MING-TUNG WU, CHUN-KAI LAN, TUNG-HE CHOU, HSUN-CHUNG KUANG
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Patent number: 10119909Abstract: A biological sensing structure includes a mesa integrally connected a portion of a substrate, wherein the mesa has a top surface and a sidewall surface adjacent to the top surface. The biological sensing structure includes a first light reflecting layer over the top surface and the sidewall surface of the mesa. The biological sensing structure includes a filling material surrounding the mesa, wherein the mesa protrudes from the filling material. The biological sensing structure includes a stop layer over the filling material and a portion of the first light reflecting layer. The biological sensing structure includes a second light reflecting layer over a portion of the stop layer and a portion of the top surface of the mesa. The biological sensing structure includes an opening in the second light reflecting layer to partially expose the top surface of the mesa.Type: GrantFiled: June 23, 2016Date of Patent: November 6, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Hua Lin, Li-Cheng Chu, Ming-Tung Wu, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai
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Publication number: 20170301563Abstract: A wafer carrier assembly includes a wafer carrier and a fluid passage. The wafer carrier comprises a retainer ring confining a wafer accommodation space. The fluid passage is inside the wafer carrier. The fluid passage includes an inlet and at least an outlet to dispense fluid into the wafer accommodation space.Type: ApplicationFiled: April 15, 2016Publication date: October 19, 2017Inventors: MING-TUNG WU, HSUN-CHUNG KUANG
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Patent number: 9472504Abstract: The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a via structure includes a via having via sidewall surfaces defined by a semiconductor substrate. The via sidewall surfaces have a first portion and a second portion. A conductive layer is disposed in the via on the first portion of the via sidewall surfaces, and a dielectric layer is disposed on the second portion of the via sidewall surfaces. The dielectric layer is disposed between the second portion of the via sidewall surfaces and the conductive layer. In an example, the dielectric layer is an oxide layer.Type: GrantFiled: July 27, 2015Date of Patent: October 18, 2016Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yuan-Chih Hsieh, Li-Cheng Chu, Ming-Tung Wu, Ping-Yin Liu, Lan-Lin Chao, Chia-Shiung Tsai
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Publication number: 20160299068Abstract: A biological sensing structure includes a mesa integrally connected a portion of a substrate, wherein the mesa has a top surface and a sidewall surface adjacent to the top surface. The biological sensing structure includes a first light reflecting layer over the top surface and the sidewall surface of the mesa. The biological sensing structure includes a filling material surrounding the mesa, wherein the mesa protrudes from the filling material. The biological sensing structure includes a stop layer over the filling material and a portion of the first light reflecting layer. The biological sensing structure includes a second light reflecting layer over a portion of the stop layer and a portion of the top surface of the mesa. The biological sensing structure includes an opening in the second light reflecting layer to partially expose the top surface of the mesa.Type: ApplicationFiled: June 23, 2016Publication date: October 13, 2016Inventors: Hung-Hua Lin, Li-Cheng Chu, Ming-Tung Wu, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai
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Patent number: 9377401Abstract: A biological sensing structure includes a mesa integrally connected a portion of a substrate, wherein the mesa has a top surface and a sidewall surface adjacent to the top surface. The biological sensing structure includes a first light reflecting layer over the top surface and the sidewall surface of the mesa. The biological sensing structure includes a filling material surrounding the mesa, wherein the mesa protrudes from the filling material. The biological sensing structure includes a stop layer over the filling material and a portion of the first light reflecting layer. The biological sensing structure includes a second light reflecting layer over a portion of the stop layer and a portion of the top surface of the mesa. The biological sensing structure includes an opening in the second light reflecting layer to partially expose the top surface of the mesa.Type: GrantFiled: September 19, 2014Date of Patent: June 28, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Hua Lin, Li-Cheng Chu, Ming-Tung Wu, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai
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Patent number: 9355882Abstract: A wafer grinding system includes a robot arm having a suction board at one end and a table within reach of the robot arm. An upper surface of the table has a vacuum surface for sucking and holding wafers. A pusher coupled to the robot arm extends about the periphery of the suction board. The pusher flattens wafers against the upper surface of the table, allowing the table to hold by suction wafers that would otherwise be too bowed to be held in that way. Additionally, a table can have a vacuum area that is small in comparison to the wafers, which is another way of increasing the magnitude of wafer bow that can be tolerated. A grinding system can use the reduced vacuum area concept to allow the positioning table to hold bowed wafers and the pusher concept to allow the chuck tables to hold bowed wafers.Type: GrantFiled: December 4, 2013Date of Patent: May 31, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ming-Tung Wu, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai