Abstract: A CDBGA package comprises a thermal dissipating substrate and a plurality of conductive bumps. A plurality of vias are formed on a circuit substrate and correspond to the conductive bumps. A plurality of ground pads, ball pads and nodes are formed on the circuit substrate, wherein the ground pads are located in the vias. A solder mask layer covers the patterned trace layer. A plurality of bonding pads are formed on a chip and are electrically connected to the nodes. A molding compound encapsulates the chip, nodes and bonding pads. A plurality of solder balls are located on the ground pads and ball pads, wherein the solder balls fill the vias and are electrically connected to the conductive bumps.

Abstract: A CDBGA package comprises a thermal dissipating substrate and a plurality of conductive bumps. A plurality of vias are formed on a circuit substrate and correspond to the conductive bumps. A plurality of ground pads, ball pads and nodes are formed on the circuit substrate, wherein the ground pads are located in the vias. A solder mask layer covers the patterned trace layer. A plurality of bonding pads are formed on a chip and are electrically connected to the nodes. A molding compound encapsulates the chip, nodes and bonding pads A plurality of solder balls are located on the ground pads and ball pads, wherein the solder balls fill the vias and are electrically connected to the conductive bumps.

Abstract: A CDBGA package comprises a thermal dissipating substrate and a plurality of conductive bumps. A plurality of vias are formed on a circuit substrate and correspond to the conductive bumps. A plurality of ground pads, ball pads and nodes are formed on the circuit substrate, wherein the ground pads are located in the vias. A solder mask layer covers the patterned trace layer. A plurality of bonding pads are formed on a chip and are electrically connected to the nodes. A molding compound encapsulates the chip, nodes and bonding pads. A plurality of solder balls are located on the ground pads and ball pads, wherein the solder balls fill the vias and are electrically connected to the conductive bumps.

Abstract: A CDBGA package comprises a thermal dissipating substrate and a plurality of conductive bumps. A plurality of vias are formed on a circuit substrate and correspond to the conductive bumps. A plurality of ground pads, ball pads and nodes are formed on the circuit substrate, wherein the ground pads are located in the vias. A solder mask layer covers the patterned trace layer. A plurality of bonding pads are formed on a chip and are electrically connected to the nodes. A molding compound encapsulates the chip, nodes and bonding pads. A plurality of solder balls are located on the ground pads and ball pads, wherein the solder balls fill the vias and are electrically connected to the conductive bumps.