Patents by Inventor Min Shik SEOK

Min Shik SEOK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9983617
    Abstract: An integrated circuit configured to detect a variation in a supply voltage using a phase of an input clock signal dependent on the variation in the supply voltage may include a clock delay circuit configured to delay the input clock signal output from a clock generator using each of different delay cell chains and generate a first delay clock signal and a second delay clock signal; and a phase controller configured to control a first phase so that a difference between the first phase and a second phase is 180 degrees, the first phase being a phase of the first delay clock signal, the second phase being a phase of the second delay clock signal.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: May 29, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je Kook Kim, Chan Woo Park, Min Shik Seok
  • Patent number: 9720503
    Abstract: A vibration control device configured to provide a haptic function and control a vibration device driven by a sine wave. The vibration control device includes a sampling frequency signal generator and a sine wave synthesizer. The vibration control device is configured to generate a sampling frequency signal using a clock signal, wherein the sampling frequency signal is related to an operation cycle of a digital filter; and the sine wave synthesizer includes the digital filter. The digital filter is configured to adjust at least one of a cycle of the sine wave and amplitude of the sine wave using the sampling frequency signal and a plurality of coefficients of the digital filter; and generate an adjusted sine wave.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: August 1, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je Kook Kim, Min Shik Seok, Seon Mi Jeon, Seong Wook Hwang
  • Patent number: 9671847
    Abstract: In a semiconductor device for power management and a semiconductor system including the same, the semiconductor device includes an open loop source generator configured to generate an open loop source, an interface configured to output a dynamic voltage source (DVS) code based on the open loop source, a monitoring unit configured to receive a power supply voltage generated based on the DVS code as a feedback and generate a monitoring signal, and a phase difference measurement unit configured to compare the open loop source with the monitoring signal and set a hold time corresponding to an arithmetic period in a closed loop.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: June 6, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Kook Kim, Young-Hoon Lee, Min-Shik Seok
  • Publication number: 20160334872
    Abstract: A vibration control device configured to provide a haptic function and control a vibration device driven by a sine wave. The vibration control device includes a sampling frequency signal generator and a sine wave synthesizer. The vibration control device is configured to generate a sampling frequency signal using a clock signal, wherein the sampling frequency signal is related to an operation cycle of a digital filter; and the sine wave synthesizer includes the digital filter. The digital filter is configured to adjust at least one of a cycle of the sine wave and amplitude of the sine wave using the sampling frequency signal and a plurality of coefficients of the digital filter; and generate an adjusted sine wave.
    Type: Application
    Filed: January 20, 2016
    Publication date: November 17, 2016
    Inventors: Je Kook Kim, Min Shik Seok, Seon Mi Jeon, Seong Wook Hwang
  • Publication number: 20160327975
    Abstract: An integrated circuit configured to detect a variation in a supply voltage using a phase of an input clock signal dependent on the variation in the supply voltage may include a clock delay circuit configured to delay the input clock signal output from a clock generator using each of different delay cell chains and generate a first delay clock signal and a second delay clock signal; and a phase controller configured to control a first phase so that a difference between the first phase and a second phase is 180 degrees, the first phase being a phase of the first delay clock signal, the second phase being a phase of the second delay clock signal.
    Type: Application
    Filed: March 1, 2016
    Publication date: November 10, 2016
    Inventors: JE KOOK KIM, Chan Woo Park, Min Shik Seok
  • Publication number: 20160116956
    Abstract: In a semiconductor device for power management and a semiconductor system including the same, the semiconductor device includes an open loop source generator configured to generate an open loop source, an interface configured to output a dynamic voltage source (DVS) code based on the open loop source, a monitoring unit configured to receive a power supply voltage generated based on the DVS code as a feedback and generate a monitoring signal, and a phase difference measurement unit configured to compare the open loop source with the monitoring signal and set a hold time corresponding to an arithmetic period in a closed loop.
    Type: Application
    Filed: May 26, 2015
    Publication date: April 28, 2016
    Inventors: Je-Kook Kim, Young-Hoon Lee, Min-Shik Seok
  • Patent number: 9124172
    Abstract: A digital buck-boost conversion circuit includes an analog-to-digital converter configured to convert an output voltage signal into a digital signal, a pulse period control block configured to output a pulse period control signal based on degrees of scattering at different frequencies of the digital signal, a pulse generation block configured to output a pulse based on the pulse period control signal, and a buck-boost converter configured to convert the pulse into the output voltage signal.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: September 1, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je Kook Kim, Sang-Yong Park, Chan-Woo Park, Young Hoon Lee, Byung Chul Jeon, Min Shik Seok
  • Publication number: 20130169244
    Abstract: A digital buck-boost conversion circuit includes an analog-to-digital converter configured to convert an output voltage signal into a digital signal, a pulse period control block configured to output a pulse period control signal based on degrees of scattering at different frequencies of the digital signal, a pulse generation block configured to output a pulse based on the pulse period control signal, and a buck-boost converter configured to convert the pulse into the output voltage signal.
    Type: Application
    Filed: September 11, 2012
    Publication date: July 4, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Je Kook KIM, Sang-Yong PARK, Chan-Woo PARK, Young Hoon LEE, Byung Chul JEON, Min Shik SEOK