Patents by Inventor Misa SUGIMURA

Misa SUGIMURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10121767
    Abstract: A semiconductor storage device of the present embodiments includes a substrate, a first semiconductor chip and a sealer. The substrate has wirings. The first semiconductor chip is connected to the wirings on the substrate. The sealer has a first surface, which does not face a top surface of the first semiconductor chip and is provided with a mark, and seals the first semiconductor chip.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: November 6, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Misa Sugimura, Akihiro Iida
  • Publication number: 20170077065
    Abstract: A semiconductor storage device of the present embodiments includes a substrate, a first semiconductor chip and a sealer. The substrate has wirings. The first semiconductor chip is connected to the wirings on the substrate. The sealer has a first surface, which does not face a top surface of the first semiconductor chip and is provided with a mark, and seals the first semiconductor chip.
    Type: Application
    Filed: March 7, 2016
    Publication date: March 16, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Misa SUGIMURA, Akihiro IIDA
  • Patent number: 8975763
    Abstract: According to one embodiment, a semiconductor memory device includes an electrical terminal disposed in a first side; a first surface including a first part, a second part, and a third part, a mark of the semiconductor memory device being printed in the first part, the second part being disposed in a second side, the second side being opposite side of the first side, the third part being disposed around the first part, a first surface roughness of the first part being higher than a second surface roughness of the third part.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: March 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Misa Sugimura, Toshiro Yokoyama
  • Publication number: 20140376169
    Abstract: According to one embodiment, a semiconductor memory device includes an electrical terminal disposed in a first side; a first surface including a first part, a second part, and a third part, a mark of the semiconductor memory device being printed in the first part, the second part being disposed in a second side, the second side being opposite side of the first side, the third part being disposed around the first part, a first surface roughness of the first part being higher than a second surface roughness of the third part.
    Type: Application
    Filed: May 15, 2014
    Publication date: December 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Misa SUGIMURA, Toshiro YOKOYAMA
  • Publication number: 20140374757
    Abstract: A circuit board includes a first metal pattern which includes a marking and a first solder resist, a semiconductor memory element mounted on a circuit board, a connection terminal, and a mold resin covering the semiconductor memory element. The semiconductor memory device displays information through the marking which is formed by laser processing on the first metal pattern in areas where the test terminal and the electrode terminal are not provided and the semiconductor memory element is sealed with a mold resin.
    Type: Application
    Filed: March 3, 2014
    Publication date: December 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Misa SUGIMURA, Yuuji OGAWA