Patents by Inventor Misao Umematsu

Misao Umematsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Thin film wiring board and method for manufacturing the same, base substrate and method for manufacturing the same
    Patent number: 6465085
    Abstract: A dummy pad is formed through a polyimide insulating layer so as to be provided opposite to a via connecting pad formed on the surface of a ceramic substrate. A defect occurring in the via connecting pad is filled with a protrusion when the dummy pad is formed. Accordingly, the influence of the defect upon a layer above the dummy pad is prevented. Further, in a method for manufacturing a thin film wiring board obtained by forming a thin film layer on a base substrate having a via that allows interlayer electric conduction, a void defect existing in the via is filled with a conductive material having corrosion resistance against an etchant, and then the thin film layer is formed on the base substrate.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: October 15, 2002
    Assignee: Fujitsu Limited
    Inventors: Zhiyi Song, Kiyokazu Moriizumi, Takami Sasahara, Norikazu Ozaki, Manabu Watanabe, Misao Umematsu, Shunichi Kikuchi
  • Multi-layer wiring substrate
    Patent number: 6399897
    Abstract: A multi-layer wiring substrate includes a main substrate and a plurality of insulating films stacked on the main substrate. The plurality of insulating films have wiring patterns formed on wiring regions thereof and dummy wiring patterns formed on peripheral regions of the wiring regions. The wiring patterns include signal wiring patterns, power supply wiring patterns, and vias. The dummy wiring patterns correspond to the wiring patterns, respectively.
    Type: Grant
    Filed: August 2, 2000
    Date of Patent: June 4, 2002
    Assignee: Fujitsu Limited
    Inventors: Misao Umematsu, Shunichi Kikuchi, Kiyokazu Moriizumi, Kazuaki Satoh, Norikazu Ozaki
  • Connector having skirt with holes to receive plug pins and alignment pin
    Patent number: 5437558
    Abstract: A connector comprising a plug member having pin-like male contacts and a jack member having female contacts, the jack member being coupled with the plug member by a plug-in connection. A skirt having a plurality of holes is arranged to hold the pin-like male contacts in position. The skirt is supported in the plug member by the locating groove-pin engagement. The locating groove-pin engagement is released by the jack member when the jack member is inserted into the plug member and reestablished by the jack member when the jack member is withdrawn from the plug member. The skirt also has an alignment pin which is received in a locating hole of the jack member when the jack member is inserted into the plug member. Therefore, it is possible to insert the jack member in the plug member without the pin-like male contacts being bent, as well as to easily withdraw the jack member from the plug member.
    Type: Grant
    Filed: August 20, 1993
    Date of Patent: August 1, 1995
    Assignee: Fujitsu Limited
    Inventors: Masahiko Sakuraoka, Kouichi Hara, Kiyoshi Kuwabara, Misao Umematsu