Abstract: A method for manufacturing a semiconductor device includes a capacitor element in which a capacitance dielectric film is provided between an upper electrode film and a lower electrode film, includes forming the lower electrode film over the semiconductor substrate, forming the capacitance dielectric film over the lower electrode film, and forming the upper electrode film over the capacitance dielectric film, wherein, an entire surface layer of the lower electrode film is formed of a polycrystalline titanium nitride. At the portion of the capacitance dielectric film where directly contacting the entire surface layer of the lower electrode is formed of a polycrystalline metal oxide, and the polycrystalline metal oxide is formed by an ALD method and inherits a crystallinity of the polycrystalline titanium nitride.

Abstract: A capacitive element has improved electrical properties. The capacitive element is configured in a DRAM cell and has a lower electrode, a capacitive insulator film formed over the lower electrode, and an upper electrode formed over the capacitive insulator film. The upper electrode has a structure in which from the capacitive insulator film side of this electrode, a first upper electrode, a second upper electrode and a third upper electrode are stacked in turn. The third upper electrode is a tungsten film that may contain an impurity. Between the first and third upper electrodes, the second upper electrode is interposed which is a barrier film for preventing the possible impurity in the third upper electrode from diffusing into the capacitive insulator film.

Abstract: A method for manufacturing a semiconductor device includes a capacitor element in which a capacitance dielectric film is provided between an upper electrode film and a lower electrode film, includes forming the lower electrode film over the semiconductor substrate, forming the capacitance dielectric film over the lower electrode film, and forming the upper electrode film over the capacitance dielectric film, wherein, an entire surface layer of the lower electrode film is formed of a polycrystalline titanium nitride. At the portion of the capacitance dielectric film where directly contacting the entire surface layer of the lower electrode is formed of a polycrystalline metal oxide, and the polycrystalline metal oxide is formed by an ALD method and inherits a crystallinity of the polycrystalline titanium nitride.

Abstract: A capacitive element has improved electrical properties. The capacitive element is configured in a DRAM cell and has a lower electrode, a capacitive insulator film formed over the lower electrode, and an upper electrode formed over the capacitive insulator film. The upper electrode has a structure in which from the capacitive insulator film side of this electrode, a first upper electrode, a second upper electrode and a third upper electrode are stacked in turn. The third upper electrode is a tungsten film that may contain an impurity. Between the first and third upper electrodes, the second upper electrode is interposed which is a barrier film for preventing the possible impurity in the third upper electrode from diffusing into the capacitive insulator film.

Abstract: A capacitive element has improved electrical properties. The capacitive element is configured in a DRAM cell and has a lower electrode, a capacitive insulator film formed over the lower electrode, and an upper electrode formed over the capacitive insulator film. The upper electrode has a structure in which from the capacitive insulator film side of this electrode, a first upper electrode, a second upper electrode and a third upper electrode are stacked in turn. The third upper electrode is a tungsten film that may contain an impurity. Between the first and third upper electrodes, the second upper electrode is interposed which is a barrier film for preventing the possible impurity in the third upper electrode from diffusing into the capacitive insulator film.

Abstract: A semiconductor device has a capacitor element in which a capacitance dielectric film is disposed between an upper electrode film (upper electrode film, an upper electrode film) and a lower electrode film, and the lower electrode film has polycrystalline titanium nitride at least to a portion in contact with the capacitance dielectric film.

Abstract: With a stage kept in an as-heated state, a semiconductor wafer is placed over the stage. Then, with the elapse of a first time, a controller causes a pressure inside a vacuum chamber to rise to a second pressure higher than a first pressure (step S40). After the semiconductor wafer is placed over the stage, a pressure difference between a pressure inside the vacuum chamber and a pressure inside an adsorption port is set to a minimum value at which the semiconductor wafer is not allowed to slide over protrusions. Further, in step S40 as well, the pressure difference is kept at the minimum value at which the semiconductor wafer is not allowed to slide over the protrusions.

Abstract: A manufacturing method of a semiconductor device includes the following steps. Firstly, a lower electrode is formed over a substrate (semiconductor substrate). Successively, the lower electrode is primarily crystallized. Successively, a capacitance dielectric layer is formed over the lower electrode after primarily crystallized. Successively, the capacitance dielectric layer is secondarily crystallized. Then, an upper electrode is formed over the capacitance dielectric layer.

Abstract: A manufacturing method of a semiconductor device includes the following steps. Firstly, a lower electrode is formed over a substrate (semiconductor substrate). Successively, the lower electrode is primarily crystallized. Successively, a capacitance dielectric layer is formed over the lower electrode after primarily crystallized. Successively, the capacitance dielectric layer is secondarily crystallized. Then, an upper electrode is formed over the capacitance dielectric layer.

Abstract: With the stage kept in an as-heated state, the semiconductor wafer is placed over the stage (step S10). Then, with the elapse of first time, a controller causes a pressure inside a vacuum chamber to rise to a second pressure higher than a first pressure (step S40). After the semiconductor wafer is placed over the stage, a pressure difference between a pressure inside the vacuum chamber and a pressure inside the adsorption port is set to a minimum value at which the semiconductor wafer is not allowed to slide over the protrusions. Further, in step S40 as well, the pressure difference is kept at the minimum value at which the semiconductor wafer is not allowed to slide over the protrusions.

Abstract: A semiconductor device has a capacitor element in which a capacitance dielectric film is disposed between an upper electrode film (upper electrode film, an upper electrode film) and a lower electrode film, and the lower electrode film has polycrystalline titanium nitride at least to a portion in contact with the capacitance dielectric film.