Abstract: A method of verifying authenticity of a speculative load instruction is disclosed which includes receiving a new speculative source-destination pair (PAIR), wherein the source represents a speculative load instruction and the destination represents an associated destination virtual memory location holding data to be loaded onto a register with execution of the source, checking the PAIR against one or more memory tables associated with non-speculative source-destination pairs, if the PAIR exists in the one or more memory tables, then executing the instruction associated with the source of the PAIR, if the PAIR does not exist, then i) waiting until the speculation of the source instruction has cleared as being non-speculative, ii) updating the one or more memory tables, and iii) executing the instruction associated with the source, and if the speculation of the source instruction of the PAIR does not clear as non-speculative, then the source is nullified.

Abstract: A receiver-directed congestion control system which provides receiver-directed apportioning by adding a bandwidth share indicator value to the acknowledgement messages sent by the receiver to the senders. In certain embodiments, bandwidth share indicator value comprises the number of senders seen by the receiver. In other embodiments, the bandwidth share indicator value may comprise a percentage bandwidth share allocated to the sender computer to allow for varying priorities between senders. In the acknowledgement message, each sender may also include the incast degree, which is programmed in the application, to the receiver. This strategy enables the receiver to send back the sender count to all the senders as soon the first sender's packets arrive, even before the rest of the senders' packets arrive. Thus, the sender count and the incast degree look-ahead enable the receiver-directed system to achieve accurate and faster convergence of sending rates, without any repeated adjustments.

Abstract: A remote indirect memory access system and method for networked computer servers. The system comprises a network interface card having a network interface memory and a system memory operatively connected to the network interface card. The system memory has a plurality of electronic memory queues, wherein each of the memory queues corresponds to one of a plurality of receive processes in the computer server, with each of the memory queues having a corresponding head pointer and tail pointer. Each of the memory queues is assigned to receive electronic messages from a plurality of sender computers. The NIC comprises a tail pointer table, with the tail pointer table comprising initial memory location data of the tail pointers for the memory queues. The memory location data referenced by corresponding queue identifiers.

Abstract: A remote indirect memory access system and method for networked computer servers. The system comprises a network interface card having a network interface memory and a system memory operatively connected to the network interface card. The system memory has a plurality of electronic memory queues, wherein each of the memory queues corresponds to one of a plurality of receive processes in the computer server, with each of the memory queues having a corresponding head pointer and tail pointer. Each of the memory queues is assigned to receive electronic messages from a plurality of sender computers. The NIC comprises a tail pointer table, with the tail pointer table comprising initial memory location data of the tail pointers for the memory queues. The memory location data referenced by corresponding queue identifiers.

Abstract: A receiver-directed congestion control system which provides receiver-directed apportioning by adding a bandwidth share indicator value to the acknowledgement messages sent by the receiver to the senders. In certain embodiments, bandwidth share indicator value comprises the number of senders seen by the receiver. In other embodiments, the bandwidth share indicator value may comprise a percentage bandwidth share allocated to the sender computer to allow for varying priorities between senders. In the acknowledgement message, each sender may also include the incast degree, which is programmed in the application, to the receiver. This strategy enables the receiver to send back the sender count to all the senders as soon the first sender's packets arrive, even before the rest of the senders' packets arrive. Thus, the sender count and the incast degree look-ahead enable the receiver-directed system to achieve accurate and faster convergence of sending rates, without any repeated adjustments.

Abstract: A microfluidic arrangement including a fluid channel configured to receive a first fluid from a first inlet and a second fluid from a second inlet, and a mixer connected to the fluid channel, the mixer including a mixer channel configured to receive a volume of the first fluid and a volume of the second fluid from the fluid channel, the mixer channel defining a mixer capacity, wherein the mixer is (i) configured to mix the volume of the first fluid and the volume of the second fluid in order to provide a mixture of the first fluid and the second fluid when the combined volume of the first fluid and the second fluid is less than the mixer capacity, and (ii) further configured to mix the volume of the first fluid and the volume of the second fluid in order to provide a mixture of the first fluid and the second fluid when the combined volume of the first fluid and the second fluid is equal to the mixer capacity.

Abstract: A microfluidic device is programmable so that a single microarchitecture design can run many assays. Specifically, the programmable microfluidic device includes an execution method to facilitate translating from a programming language to a set of requests that are specified for the device. In addition, the microfluidic device includes a contamination mitigation method that includes a conflict list to mitigate contamination effects within the microfluidic device.

Abstract: A microfluidic device is programmable so that a single microarchitecture design can run many assays. Specifically, the programmable microfluidic device includes an execution method to facilitate translating from a programming language to a set of requests that are specified for the device. In addition, the microfluidic device includes a contamination mitigation method that includes a conflict list to mitigate contamination effects within the microfluidic device.

Abstract: A microfluidic arrangement including a fluid channel configured to receive a first fluid from a first inlet and a second fluid from a second inlet, and a mixer connected to the fluid channel, the mixer including a mixer channel configured to receive a volume of the first fluid and a volume of the second fluid from the fluid channel, the mixer channel defining a mixer capacity, wherein the mixer is (i) configured to mix the volume of the first fluid and the volume of the second fluid in order to provide a mixture of the first fluid and the second fluid when the combined volume of the first fluid and the second fluid is less than the mixer capacity, and (ii) further configured to mix the volume of the first fluid and the volume of the second fluid in order to provide a mixture of the first fluid and the second fluid when the combined volume of the first fluid and the second fluid is equal to the mixer capacity.