Patents by Inventor Mitsuaki Hatakeyama

Mitsuaki Hatakeyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9484759
    Abstract: A power supply detection circuit detects power feeding to a VBUS terminal from the outside. A charger detection circuit detects the kind of charger by monitoring voltages of a DP terminal and a DM terminal. A control unit adjusts timing and instructs the charger detection circuit to start a charger kind detection process after a notification of detection of power feeding is received from the power supply detection circuit.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: November 1, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atsushi Wada, Hajime Mizukami, Mitsuaki Hatakeyama, Shigeto Kobayashi
  • Publication number: 20160164327
    Abstract: A power supply detection circuit detects power feeding to a VBUS terminal from the outside. A charger detection circuit detects the kind of charger by monitoring voltages of a DP terminal and a DM terminal. A control unit adjusts timing and instructs the charger detection circuit to start a charger kind detection process after a notification of detection of power feeding is received from the power supply detection circuit.
    Type: Application
    Filed: August 1, 2014
    Publication date: June 9, 2016
    Inventors: Atsushi Wada, Hajime Mizukami, Mitsuaki Hatakeyama, Shigeto Kobayashi
  • Patent number: 9077195
    Abstract: A power supply detection circuit detects power feeding to a VBUS terminal from the outside. A charger detection circuit specifies the kind of charger by detecting the voltages of a DP terminal and a DM terminal. The charger detection circuit detects open, pull-up, pull-down of at least one of the DP terminal and the DM terminal or formation of a short circuit between both the terminals.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: July 7, 2015
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atsushi Wada, Hajime Mizukami, Mitsuaki Hatakeyama, Shigeto Kobayashi
  • Publication number: 20140340026
    Abstract: A power supply detection circuit detects power feeding to a VBUS terminal from the outside. A charger detection circuit detects the kind of charger by monitoring voltages of a DP terminal and a DM terminal. A control unit adjusts timing and instructs the charger detection circuit to start a charger kind detection process after a notification of detection of power feeding is received from the power supply detection circuit.
    Type: Application
    Filed: August 1, 2014
    Publication date: November 20, 2014
    Inventors: Atsushi Wada, Hajime Mizukami, Mitsuaki Hatakeyama, Shigeto Kobayashi
  • Patent number: 8796988
    Abstract: A power supply detection circuit detects power feeding to a VBUS terminal from the outside. A charger detection circuit detects the kind of charger by monitoring voltages of a DP terminal and a DM terminal. A control unit adjusts timing and instructs the charger detection circuit to start a charger kind detection process after a notification of detection of power feeding is received from the power supply detection circuit.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: August 5, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Atsushi Wada, Hajime Mizukami, Mitsuaki Hatakeyama, Shigeto Kobayashi
  • Publication number: 20120256596
    Abstract: A power supply detection circuit detects power feeding to a VBUS terminal from the outside. A charger detection circuit specifies the kind of charger by detecting the voltages of a DP terminal and a DM terminal. The charger detection circuit detects open, pull-up, pull-down of at least one of the DP terminal and the DM terminal or formation of a short circuit between both the terminals.
    Type: Application
    Filed: March 26, 2012
    Publication date: October 11, 2012
    Inventors: Atsushi WADA, Hajime MIZUKAMI, Mitsuaki HATAKEYAMA, Shigeto KOBAYASHI
  • Patent number: 6016370
    Abstract: An image data processing apparatus is described that prevents the quality of image data from being degraded by pixel quantity conversion. The apparatus includes an analog processor, a quantity converter and a binarization converter. The analog processor quantizes each of the analog element data to generate multiple-state element data, The quantity converter changes the number of plural pieces of multiple-state element data in one line to generate quantity-converted element data. The quantity converter averages at least two adjacent pieces of multiple-state element data to generate an average value as one piece of new multiple-state element data. The quantity converter further selectively outputs the new multiple-state element data and original multiple-state element data as the quantity-converted element data. The binarization converter binarizes the quantity-converted element data to generate binary element data.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: January 18, 2000
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Mitsuaki Hatakeyama, Kenichi Ohkubo