Abstract: A power-supply module according to the present embodiment comprises a capacitor and a switching circuit. The switching circuit comprises a plurality of switching elements, and is configured to charge the capacitor by using an input voltage with a combination of connection and disconnection of the switching elements, and output an output voltage that is different from the input voltage. The capacitor is a silicon capacitor, and each of the switching elements is a transistor.

Abstract: A power-supply module according to the present embodiment comprises a capacitor and a switching circuit. The switching circuit comprises a plurality of switching elements, and is configured to charge the capacitor by using an input voltage with a combination of connection and disconnection of the switching elements, and output an output voltage that is different from the input voltage. The capacitor is a silicon capacitor, and each of the switching elements is a transistor.

Abstract: A semiconductor module includes a supporting substrate having a connecting section on a first major surface thereof. A first semiconductor chip includes a first MIS transistor a source of which is formed on the bottom thereof. A second semiconductor chip includes a second MIS transistor a drain of which is formed on the bottom thereof. The first and second semiconductor chips are on the supporting substrate such that the source of the first MIS transistor and the drain of the second MIS transistor are connected to the connecting section and connected each other through the connecting section. An IC chip is provided on the first major surface and connected to gates of the first and second MIS transistors. An insulative envelope covers the supporting substrate, first and second semiconductor chips and IC chip. Partly exposed connecting terminals are electrically connected to the connecting section and first and second semiconductor chips.

Abstract: A semiconductor device comprises: a first semiconductor chip having a first MIS transistor of a first conductivity type and a second semiconductor chip having a second MIS transistor of the first conductivity type. The first MIS transistor has a source electrode formed on a first face. The second MIS transistor has a drain electrode formed on a first face. The source electrode of the first semiconductor chip and the drain electrode of the second semiconductor chip are bonded opposite to each other.

Abstract: A power switching device comprises a semiconductor substrate; a plurality of cells, each of which switches a current from a power supply to a load on the basis of a potential at a gate electrode, said cells being arranged on said semiconductor substrate to form a cell array; and a plurality of drivers connected to the gate electrode, said plurality of drivers being distributively arranged in said cell array or being distributively arranged peripheral said cell array.

Abstract: A semiconductor module includes a supporting substrate having a connecting section on a first major surface thereof. A first semiconductor chip includes a first MIS transistor a source of which is formed on the bottom thereof. A second semiconductor chip includes a second MIS transistor a drain of which is formed on the bottom thereof. The first and second semiconductor chips are on the supporting substrate such that the source of the first MIS transistor and the drain of the second MIS transistor are connected to the connecting section and connected each other through the connecting section. An IC chip is provided on the first major surface and connected to gates of the first and second MIS transistors. An insulative envelope covers the supporting substrate, first and second semiconductor chips and IC chip. Partly exposed connecting terminals are electrically connected to the connecting section and first and second semiconductor chips.

Abstract: A semiconductor module includes a supporting substrate having a connecting section on a first major surface thereof. A first semiconductor chip includes a first MIS transistor a source of which is formed on the bottom thereof. A second semiconductor chip includes a second MIS transistor a drain of which is formed on the bottom thereof. The first and second semiconductor chips are on the supporting substrate such that the source of the first MIS transistor and the drain of the second MIS transistor are connected to the connecting section and connected each other through the connecting section. An IC chip is provided on the first major surface and connected to gates of the first and second MIS transistors. An insulative envelope covers the supporting substrate, first and second semiconductor chips and IC chip. Partly exposed connecting terminals are electrically connected to the connecting section and first and second semiconductor chips.

Abstract: A power switching device comprises a semiconductor substrate; a plurality of cells, each of which switches a current from a power supply to a load on the basis of a potential at a gate electrode, said cells being arranged on said semiconductor substrate to form a cell array; and a plurality of drivers connected to the gate electrode, said plurality of drivers being distributively arranged in said cell array or being distributively arranged peripheral said cell array.

Abstract: A power switching device comprises a semiconductor substrate; a plurality of cells, each of which switches a current from a power supply to a load on the basis of a potential at a gate electrode, said cells being arranged on said semiconductor substrate to form a cell array; and a plurality of drivers connected to the gate electrode, said plurality of drivers being distributively arranged in said cell array or being distributively arranged peripheral said cell array.

Abstract: A power switching device comprises a semiconductor substrate; a plurality of cells, each of which switches a current from a power supply to a load on the basis of a potential at a gate electrode, said cells being arranged on said semiconductor substrate to form a cell array; and a plurality of drivers connected to the gate electrode, said plurality of drivers being distributively arranged in said cell array or being distributively arranged peripheral said cell array.

Abstract: A semiconductor module includes a supporting substrate having a connecting section on a first major surface thereof. A first semiconductor chip includes a first MIS transistor a source of which is formed on the bottom thereof. A second semiconductor chip includes a second MIS transistor a drain of which is formed on the bottom thereof. The first and second semiconductor chips are on the supporting substrate such that the source of the first MIS transistor and the drain of the second MIS transistor are connected to the connecting section and connected each other through the connecting section. An IC chip is provided on the first major surface and connected to gates of the first and second MIS transistors. An insulative envelope covers the supporting substrate, first and second semiconductor chips and IC chip. Partly exposed connecting terminals are electrically connected to the connecting section and first and second semiconductor chips.

Abstract: A semiconductor device comprises a first conductivity type semiconductor substrate, a first conductivity type semiconductor layer formed on the substrate, a MISFET formed in a first area of the semiconductor layer, having a drain and source, and a gate electrode formed on a semiconductor layer between the drain and source through a gate insulator, an internal source electrode formed to contact the source and whose surface is covered with an insulating layer, a diode formed in a second area of the semiconductor layer, having a cathode and an anode provided on the cathode, an anode electrode which contacts the anode, a conductive portion piercing the semiconductor layer to electrically connect the internal source electrode and the cathode to the substrate, and a source/cathode electrode formed on the back plane of the substrate and commonly provided as a source electrode of the MISFET and a cathode electrode of the diode.

Abstract: A semiconductor device comprises a first conductivity type semiconductor substrate, a first conductivity type semiconductor layer formed on the substrate, a MISFET formed in a first area of the semiconductor layer, having a drain and source, and a gate electrode formed on a semiconductor layer between the drain and source through a gate insulator, an internal source electrode formed to contact the source and whose surface is covered with an insulating layer, a diode formed in a second area of the semiconductor layer, having a cathode and an anode provided on the cathode, an anode electrode which contacts the anode, a conductive portion piercing the semiconductor layer to electrically connect the internal source electrode and the cathode to the substrate, and a source/cathode electrode formed on the back plane of the substrate and commonly provided as a source electrode of the MISFET and a cathode electrode of the diode.