Patents by Inventor Mitsuhiro Tomikawa
Mitsuhiro Tomikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10278290Abstract: An electronic component embedded substrate 1 includes a substrate 10 having a wiring layer 11 and an insulating layer 12; an electronic component 20 built in the substrate 10, and having a pair of electrode layers 21A and 21B, and a dielectric layer 22; and a stress relieving layer 30 provided closer to the wiring layer 11 than the insulating layer 12 is in the lamination direction, wherein at least part of an end portion of the electronic component 20 on the wiring layer 11 side is in contact with the stress relieving layer 30, wherein at least part of an end portion of the electronic component 20 on the insulating layer 12 side is in contact with the insulating layer 12, and wherein the Young's modulus of the stress relieving layer 30 is lower than the Young's modulus of the electrode layer 21B.Type: GrantFiled: July 19, 2017Date of Patent: April 30, 2019Assignee: TDK CORPORATIONInventors: Kenichi Yoshida, Mitsuhiro Tomikawa
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Patent number: 10211157Abstract: An electronic component includes a first electronic component and a second electronic component that is stacked on the first electronic component. A second electrode layer of the first electronic component includes a plurality of divided electrode layers, and a pair of electrodes of the second electronic component are electrically connected to different electrode layers included in the plurality of electrode layers of the second electrode layer, and a first electrode layer of the first electronic component is divided into a plurality of electrode layers to correspond to the electrode layers which are included in the second electrode layer and which are electrically connected to the pair of electrodes of the second electronic component.Type: GrantFiled: June 26, 2017Date of Patent: February 19, 2019Assignee: TDK CORPORATIONInventors: Kenichi Yoshida, Mitsuhiro Tomikawa, Eiko Wakata
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Patent number: 10143092Abstract: A circuit substrate includes a core substrate having a cavity penetrating through the substrate, a metal block accommodated in the cavity of the substrate, a first build-up layer laminated on first side of the substrate and including insulating resin layers such that the first build-up layer is covering first surface of the block from the first side, and a second build-up layer laminated on second side of the substrate and including insulating resin layers such that the second build-up layer is covering second surface of the block from the second side. The first build-up layer includes an electronic component mounting structure formed on outermost portion of the first build-up layer, and the block is formed such that the first and second surfaces have roughened surfaces, respectively, and that the roughened surface of the first surface has surface roughness different from surface roughness of the roughened surface of the second surface.Type: GrantFiled: February 16, 2016Date of Patent: November 27, 2018Assignee: IBIDEN CO., LTD.Inventors: Yukinobu Mikado, Mitsuhiro Tomikawa, Koji Asano, Kotaro Takagi
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Publication number: 20180240599Abstract: In a thin-film capacitor, an electrode terminal layer is divided into a plurality of parts by a penetration portion, and includes a frame portion as one divided part. The frame portion is disposed along an outer edge of the electrode terminal layer when viewed from the bottom surface side of the electrode terminal layer, and the frame portion can hinder deformation of the electrode terminal layer stretching or warping in a thickness direction or an in-plane direction, whereby such deformation can be prevented. Accordingly, in the thin-film capacitor, the electrode terminal layer is not likely to be deformed and an improvement in strength thereof is achieved.Type: ApplicationFiled: February 20, 2018Publication date: August 23, 2018Applicant: TDK CORPORATIONInventors: Koichi TSUNODA, Mitsuhiro TOMIKAWA, Kazuhiro YOSHIKAWA, Kenichi YOSHIDA
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Publication number: 20180235086Abstract: An electronic component embedded substrate includes: a substrate that includes an insulating layer and has a first principal surface and a second principal surface; an electronic component that is embedded in the substrate and has at least one first terminal, at least one second terminal, and a capacity part; at least one via conductor that are formed in the insulating layer and electrically connected to the second terminal; and an adhesion layer that is in contact with the second terminal on an end face of the second terminal which are close to the second principal surface. The electronic component is laminated with the insulating layer, and adhesion strength between the adhesion layer and the insulating layer is higher than that between the second terminal and the insulating layer.Type: ApplicationFiled: February 9, 2018Publication date: August 16, 2018Applicant: TDK CORPORATIONInventors: Mitsuhiro TOMIKAWA, Koichi TSUNODA, Kazuhiro YOSHIKAWA, Kenichi YOSHIDA
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Publication number: 20180233553Abstract: An electronic component embedded substrate includes: a substrate that includes an insulating layer and has a first principal surface and a second principal surface on the opposite side of the first principal surface; and an electronic component that is embedded in the substrate and has a plurality of first terminals provided close to the first principal surface, a plurality of second terminals provided close to the second principal surface, and a capacity part provided between the plurality of first terminals and the plurality of second terminals. The electronic component is configured such that at least a part of the second terminals is embedded in the insulating layer. An insulating member is provided between the neighboring second terminals to be in contact with both of the neighboring second terminals. The insulating member and the insulating layer are formed of materials whose thermal expansion coefficients are different from each other.Type: ApplicationFiled: February 8, 2018Publication date: August 16, 2018Applicant: TDK CORPORATIONInventors: Mitsuhiro TOMIKAWA, Koichi TSUNODA, Kazuhiro YOSHIKAWA, Kenichi YOSHIDA
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Patent number: 9955591Abstract: A circuit substrate includes a core substrate having a cavity penetrating through the substrate, a combined component accommodated in the cavity of the substrate, a first build-up layer laminated on first surface of the substrate and including an insulating layer such that the insulating layer is covering the cavity, a second build-up layer laminated on second surface of the substrate and including an insulating layer such that the insulating layer is covering the cavity, and a filling resin filling gap formed between the cavity and combined component accommodated in the cavity of the substrate. The combined component includes an electronic component and a metal block, the electronic component has terminal surface on side facing the first surface of the substrate, and the metal block is superposed to surface of the electronic component on the opposite side of the electronic component with respect to the terminal surface.Type: GrantFiled: July 17, 2015Date of Patent: April 24, 2018Assignee: IBIDEN CO., LTD.Inventors: Mitsuhiro Tomikawa, Koji Asano
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Patent number: 9930791Abstract: A wiring board with a built-in electronic component includes a substrate having a cavity, an interlayer insulating layer formed on the substrate such that the interlayer insulating layer is covering the cavity of the substrate, a conductor layer formed on the interlayer insulating layer, an electronic component accommodated in the cavity of the substrate and including a rectangular cuboid body and three terminal electrodes such that each of the three terminal electrodes has a metal film form formed on an outer surface of the rectangular cuboid body, and via conductors formed in the interlayer insulating layer such that the via conductors are connecting the conductor layer and the three terminal electrodes of the electronic component. The three terminal electrodes are arrayed in parallel on the outer surface of the rectangular cuboid body such that adjacent terminal electrodes have the opposite polarities.Type: GrantFiled: October 8, 2015Date of Patent: March 27, 2018Assignee: IBIDEN CO., LTD.Inventors: Mitsuhiro Tomikawa, Kota Noda, Nobuhisa Kuroda, Haruhiko Morita
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Publication number: 20180027660Abstract: An electronic component embedded substrate 1 includes a substrate 10 having a wiring layer 11 and an insulating layer 12; an electronic component 20 built in the substrate 10, and having a pair of electrode layers 21A and 21B, and a dielectric layer 22; and a stress relieving layer 30 provided closer to the wiring layer 11 than the insulating layer 12 is in the lamination direction, wherein at least part of an end portion of the electronic component 20 on the wiring layer 11 side is in contact with the stress relieving layer 30, wherein at least part of an end portion of the electronic component 20 on the insulating layer 12 side is in contact with the insulating layer 12, and wherein the Young's modulus of the stress relieving layer 30 is lower than the Young's modulus of the electrode layer 21B.Type: ApplicationFiled: July 19, 2017Publication date: January 25, 2018Applicant: TDK CORPORATIONInventors: Kenichi YOSHIDA, Mitsuhiro TOMIKAWA
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Patent number: 9872401Abstract: A circuit substrate includes a core substrate having cavity penetrating through the core substrate, a metal block accommodated in the cavity of the core substrate, a first build-up layer including an insulating layer and laminated on first side of the core substrate such that the first build-up layer is covering the cavity on the first side of the core substrate, and a second build-up layer including an insulating layer and laminated on second side of the core substrate such that the second build-up layer is covering the cavity on the second side of the core substrate, and a filling resin filling gap formed between the cavity and block positioned in the cavity of the core substrate. The block has roughened surfaces such that the roughened surfaces are in contact with the insulating layers in the first and second build-up layers on the first and second sides of the core substrate.Type: GrantFiled: July 6, 2015Date of Patent: January 16, 2018Assignee: IBIDEN CO., LTD.Inventors: Mitsuhiro Tomikawa, Koji Asano
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Publication number: 20170373009Abstract: An electronic component includes a first electronic component and a second electronic component that is stacked on the first electronic component. A second electrode layer of the first electronic component includes a plurality of divided electrode layers, and a pair of electrodes of the second electronic component are electrically connected to different electrode layers included in the plurality of electrode layers of the second electrode layer, and a first electrode layer of the first electronic component is divided into a plurality of electrode layers to correspond to the electrode layers which are included in the second electrode layer and which are electrically connected to the pair of electrodes of the second electronic component.Type: ApplicationFiled: June 26, 2017Publication date: December 28, 2017Applicant: TDK CORPORATIONInventors: Kenichi YOSHIDA, Mitsuhiro TOMIKAWA, Eiko WAKATA
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Patent number: 9831163Abstract: A circuit substrate includes a core substrate having a cavity, a metal block accommodated in the cavity of the core substrate, a first build-up layer including an insulating resin layer and laminated on a first surface of the core substrate such that the insulating resin layer is covering a first surface of the metal block in the cavity, and a second build-up layer including an insulating resin layer and laminated on a second surface of the core substrate such that the insulating resin layer is covering a second surface of the metal block in the cavity. The second build-up layer includes via conductors connected to the second surface of the metal block and common lands connecting the via conductors in parallel.Type: GrantFiled: February 24, 2016Date of Patent: November 28, 2017Assignee: IBIDEN CO., LTD.Inventors: Yukinobu Mikado, Mitsuhiro Tomikawa, Koji Asano, Kotaro Takagi
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Patent number: 9743534Abstract: A wiring board with a built-in electronic component includes a substrate having cavity, an insulating layer formed on the substrate such that the insulating layer is covering the cavity, a conductor layer formed on the insulating layer, and an electronic component accommodated in the cavity and including a rectangular cuboid body and terminal electrodes such that each electrode has a metal film form formed on outer surface of the body, and via conductors formed in the insulating layer such that the via conductors are connecting the conductor layer and electrodes. The electrodes are arrayed in a matrix having rows and columns such that adjacent electrodes in row and column directions have the opposite polarities, and the conductor layer includes a line pattern shunting first group of the electrodes in one polarity and a solid pattern shunting second group of the electrodes in the other polarity.Type: GrantFiled: October 8, 2015Date of Patent: August 22, 2017Assignee: IBIDEN CO., LTD.Inventors: Mitsuhiro Tomikawa, Kota Noda, Nobuhisa Kuroda, Haruhiko Morita
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Publication number: 20160268189Abstract: A circuit substrate includes a core substrate having a cavity, a metal block accommodated in the cavity of the core substrate, a first build-up layer including an insulating resin layer and laminated on a first surface of the core substrate such that the insulating resin layer is covering a first surface of the metal block in the cavity, and a second build-up layer including an insulating resin layer and laminated on a second surface of the core substrate such that the insulating resin layer is covering a second surface of the metal block in the cavity. The second build-up layer includes via conductors connected to the second surface of the metal block and common lands connecting the via conductors in parallel.Type: ApplicationFiled: February 24, 2016Publication date: September 15, 2016Applicant: IBIDEN CO., LTD.Inventors: Yukinobu MIKADO, Mitsuhiro Tomikawa, Koji Asano, Kotaro Takagi
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Patent number: 9433097Abstract: A circuit substrate includes a core substrate having cavity, metal blocks in the cavity, first and second build-up layers including insulating layers and laminated on first and second sides of the core substrate such that the insulating layers are covering the cavity, and a filling resin filling gap formed between the cavity and metal blocks in the cavity. The cavity is penetrating through the core substrate, the core substrate has an intracavity projection structure projecting from one or more side surfaces of the cavity such that the projection structure is positioned between the metal blocks and separating the metal blocks from contacting each other in the cavity, the first build-up layer has first conductors connected to the metal blocks such that each first conductor conducts electricity or heat, and the second build-up layer has second conductors connected to the metal blocks such that each second conductor conducts electricity or heat.Type: GrantFiled: July 6, 2015Date of Patent: August 30, 2016Assignee: IBIDEN CO., LTD.Inventors: Mitsuhiro Tomikawa, Koji Asano
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Publication number: 20160242293Abstract: A circuit substrate includes a core substrate having a cavity penetrating through the substrate, a metal block accommodated in the cavity of the substrate, a first build-up layer laminated on first side of the substrate and including insulating resin layers such that the first build-up layer is covering first surface of the block from the first side, and a second build-up layer laminated on second side of the substrate and including insulating resin layers such that the second build-up layer is covering second surface of the block from the second side. The first build-up layer includes an electronic component mounting structure formed on outermost portion of the first build-up layer, and the block is formed such that the first and second surfaces have roughened surfaces, respectively, and that the roughened surface of the first surface has surface roughness different from surface roughness of the roughened surface of the second surface.Type: ApplicationFiled: February 16, 2016Publication date: August 18, 2016Applicant: IBIDEN CO., LTD.Inventors: Yukinobu MIKADO, Mitsuhiro Tomikawa, Koji Asano, Kotaro Takagi
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Publication number: 20160143134Abstract: A wiring board with built-in metal block includes a substrate having a cavity penetrating through the substrate, a metal block accommodated in the cavity and having first surface, second surface, and side surface connecting outer edges of the first and second surface, filling resin filling gap between inner side surface of the substrate in the cavity and the side surface of the block, a first build-up layer laminated on first surface of the substrate and including an insulating layer such that the first layer is covering the cavity and the first surface of the block, and a second build-up layer laminated on second surface of the substrate and including an insulating layer such that the second layer is covering the cavity and the second surface of the block. The side surface of the block is recessed such that the side surface of the block is forming a groove shape.Type: ApplicationFiled: November 17, 2015Publication date: May 19, 2016Applicant: IBIDEN CO., LTD.Inventors: Mitsuhiro TOMIKAWA, Koji ASANO, Kotaro TAKAGI
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Patent number: 9332657Abstract: A method for manufacturing a multilayer printed wiring board includes preparing a metal layer having metal member portions and connector portions connecting the metal member portions, forming laminated multilayer structures having electronic components and the metal member portions, respectively, forming cut penetrating holes in the connector portions of the metal layer, respectively, such that the connector portions of the metal layer are cut, and forming interlayer insulation layers on the laminated multilayer structures such that the laminated multilayer structures are interposed between the interlayer insulation layers. The forming of the interlayer insulation layers includes filling the cut penetrating holes with a resin derived from one or more interlayer insulation layers on the laminated multilayer structures.Type: GrantFiled: September 28, 2012Date of Patent: May 3, 2016Assignee: IBIDEN Co., Ltd.Inventors: Toshiki Furutani, Yukinobu Mikado, Mitsuhiro Tomikawa, Tomoya Terakura
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Publication number: 20160105966Abstract: A wiring board with a built-in electronic component includes a substrate having cavity, an insulating layer formed on the substrate such that the insulating layer is covering the cavity, a conductor layer formed on the insulating layer, and an electronic component accommodated in the cavity and including a rectangular cuboid body and terminal electrodes such that each electrode has a metal film form formed on outer surface of the body, and via conductors formed in the insulating layer such that the via conductors are connecting the conductor layer and electrodes. The electrodes are arrayed in a matrix having rows and columns such that adjacent electrodes in row and column directions have the opposite polarities, and the conductor layer includes a line pattern shunting first group of the electrodes in one polarity and a solid pattern shunting second group of the electrodes in the other polarity.Type: ApplicationFiled: October 8, 2015Publication date: April 14, 2016Applicant: IBIDEN CO., LTD.Inventors: Mitsuhiro TOMIKAWA, Kota NODA, Nobuhisa KURODA, Haruhiko MORITA
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Publication number: 20160105957Abstract: A wiring board with a built-in electronic component includes a substrate having a cavity, an interlayer insulating layer formed on the substrate such that the interlayer insulating layer is covering the cavity of the substrate, a conductor layer formed on the interlayer insulating layer, an electronic component accommodated in the cavity of the substrate and including a rectangular cuboid body and three terminal electrodes such that each of the three terminal electrodes has a metal film form formed on an outer surface of the rectangular cuboid body, and via conductors formed in the interlayer insulating layer such that the via conductors are connecting the conductor layer and the three terminal electrodes of the electronic component. The three terminal electrodes are arrayed in parallel on the outer surface of the rectangular cuboid body such that adjacent terminal electrodes have the opposite polarities.Type: ApplicationFiled: October 8, 2015Publication date: April 14, 2016Applicant: IBIDEN CO., LTD.Inventors: Mitsuhiro TOMIKAWA, Kota NODA, Nobuhisa KURODA, Haruhiko MORITA