Patents by Inventor Mitsuhiro Yamazaki

Mitsuhiro Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7182899
    Abstract: A manufacturing method for manufacturing ceramic electronic components, includes steps of forming a stack body by stacking ceramic green sheets and conductive layers on top of each other, punching a frame into the stack body and holding the frame in the stack body, locating a pressing force applying member inside the frame and, while the frame is held in the stack body, applying a pressing force to a portion of the stack body located inside the frame by causing the pressing force applying member located inside the frame to press against the portion of the stack body located inside the frame, to thereby form a high-density structure inside the frame while preventing the high-density structure from deforming outwardly beyond the frame. The stack body can be heated to reduce the required pressing force, and an elastic member may be provided to make the pressing force uniform.
    Type: Grant
    Filed: September 18, 2002
    Date of Patent: February 27, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shin Tanii, Yoshiya Sakaguchi, Mitsuhiro Yamazaki, Toru Kitamachi
  • Patent number: 7117377
    Abstract: In general, the present invention provides a computer apparatus, power supply control method and program for reducing the standby power requirements in a computer supporting a wake-up function. The present invention reduces standby power requirements on power off by three types of control: a wake-up function being set by a user, existence of a device actually capable of realizing the wake-up function, and supplying the power from the auxiliary source only to the device capable of realizing the wake-up function.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: October 3, 2006
    Assignee: Lenovo (Singapore) Pte Ltd.
    Inventors: Mikio Hagiwara, Shigefumi Odaohhara, Mitsuhiro Yamazaki
  • Publication number: 20060190745
    Abstract: Power usage of computing device components is controlled in a holistic manner. The projected total power consumption for the computing device to satisfy a power consumption policy for the device is determined. Power usage of each component of the computing device is controlled in a holistic manner—i.e., balancing the power usage of the component against the power usage of other components—so that the total power usage of the computing device falls within the projected total power consumption needed to satisfy the power consumption policy. How the user is currently utilizing the computing device may be periodically detected, based at least on a power consumption distribution of the components of the computing device. A current usage model is determined based on how the user is currently utilizing the computing device. The power usage of each component of the computing device is controlled based on the current usage model.
    Type: Application
    Filed: February 18, 2005
    Publication date: August 24, 2006
    Inventors: Shinji Matsushima, Yasumichi Tsukamoto, Mitsuhiro Yamazaki, Seiichi Kawano
  • Publication number: 20060155424
    Abstract: A method and system are provided for thermal management of a portable computing apparatus. Accelerometers are provided to detect changes in attitude, and temperature sensors are provided to detect changes in temperature. A fan is used to cool the internal temperature of the electronic components of the computer. In response to lift of the computer from a stationary surface, the computer may transition to an alternative state of operation. The transition may include the change of the speed of the fan and/or adjustment of the processor clock.
    Type: Application
    Filed: January 11, 2005
    Publication date: July 13, 2006
    Inventors: Takayuki Katoh, Atsushi Miyashita, Mitsuhiro Yamazaki, Hiroyuki Uchida, Susumu Shimotono, Mizuho Tadokoro
  • Patent number: 7024700
    Abstract: When the computer is powered on, a POST program is executed, and in the setting for enabling a security function, an RFID chip 33 makes Removal Detect Enable a high level and outputs it to the control side of an analog switch 67 and one input of a NAND element 63. The removal of an RF antenna 37 causes a first short-circuit element 36 to be disconnected for shutting off a terminal 71 and a terminal 73, and an INTR signal for prohibiting the keyboard input is outputted by the high-level signal of the element 63 to prohibit access to the computer. If the RF antenna is removed while the power is off, the analog switch 67 is disconnected and the power supplied from a lithium battery to a CMOS memory 50 is shut off, whereby access to the computer can be prohibited.
    Type: Grant
    Filed: July 19, 2000
    Date of Patent: April 4, 2006
    Assignee: International Business Machines Corporation
    Inventors: Hideto Horikoshi, Mitsuhiro Yamazaki, Jun Tanaka
  • Publication number: 20060053316
    Abstract: An information processing apparatus is provided, which includes: plural devices, each having a high-power mode as an operation mode in which power consumption and processing speed are high, and a low-power mode as an operation mode in which power consumption and processing speed are lower than the power consumption and processing speed of the high-power mode; a measurement unit which measures temperature of a predetermined measurement point; a device selection unit which selects a device to be minimized degradation in processing performance when an operation mode is changed from the high-power mode to the low-power mode to lower the temperature of the measurement point in a case that the measured temperature is equal to or higher than a predetermined reference temperature; and an operation mode setting unit which changes the operation mode of the selected device from the higher-power mode to the lower-power mode.
    Type: Application
    Filed: August 2, 2005
    Publication date: March 9, 2006
    Applicant: LENOVO (SINGAPORE) Pte. Ltd.
    Inventors: Mitsuhiro Yamazaki, Shinji Matsushima, Yasumichi Tsukamoto
  • Patent number: 6895515
    Abstract: The invention realizes the execution of a predetermined process just before the turn-off of the power of a computer, without incurring increase in the load. A shutdown reset logic 52 is provided between a power management unit 68 on a core chip and a power circuit 54. The logic 52 is enabled just before the system is shut down, and it interrupts the inputting of a power-off signal ?SUSC output from the power management unit 68 to the power circuit 54, inputs a signal LAST#PWG#PIIX4 representing a faulty power state to the power management unit 68 to cause a hardware reset, and inputs a signal ?PERSW#PIIX4 representing the turn-on of a power switch 92. This causes the POST to be started, and the POST turns off the power of the system after enabling the WOL function of the network adapter.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: May 17, 2005
    Assignee: International Business Machines Corporation
    Inventor: Mitsuhiro Yamazaki
  • Publication number: 20040148531
    Abstract: A power supply circuit for a computer system includes an AC adapter designed to be connectable to the computer system and supplying power to the system, a main battery and a second battery that are designed to be connectable to the computer system and get charged with power from the AC adapter and then discharge it to supply power to the system, a charger that is a charging circuit for the main battery and/or the second battery while the main battery and/or the second battery is connected to the AC adapter with the computer system powered off, and a gate array circuit for turning off the power supply to an embedded controller.
    Type: Application
    Filed: December 8, 2003
    Publication date: July 29, 2004
    Applicant: International Business Machines Corporation
    Inventors: Mitsuhiro Yamazaki, Shinji Matsushima, Hideshi Tsukamoto, Takayuki Katoh, Mitsuo Tabo
  • Publication number: 20040046285
    Abstract: In the step of cladding by applying a pressing force to a ceramic stack body, while a frame being punched into a stack body and kept therein, the stack body is pressed by a pressing force applying member located inside of the frame. According to this method, no deformations are created in the direction parallel to the surface of the stack. Therefore, such a problem as the deformation of a conductive layer due to stress in not caused, resulting in a stack body with an excellent densified structure and, when resulting stack bodies are sintered, ceramic electronic components formed of them are free of defective connections, structural defects and electrical performance failures with an excellent yield rate. In addition, by heating a stack body at applying a pressing force thereto, the densified stack body is formed under a reduced pressure. Furthermore, by having an elastic body provided to the pressing force applying member, a stack body is pressed uniformly.
    Type: Application
    Filed: June 9, 2003
    Publication date: March 11, 2004
    Inventors: Shin Tanii, Yoshiya Sakaguchi, Mitsuhiro Yamazaki, Toru Kitamachi
  • Publication number: 20030135726
    Abstract: In general, the present invention provides a computer apparatus, power supply control method and program for reducing the standby power requirements in a computer supporting a wake-up function. The present invention reduces standby power requirements on power off by three types of control: a wake-up function being set by a user, existence of a device actually capable of realizing the wake-up function, and supplying the power from the auxiliary source only to the device capable of realizing the wake-up function.
    Type: Application
    Filed: December 24, 2002
    Publication date: July 17, 2003
    Applicant: International Business Machines Corporation
    Inventors: Mikio Hagiwara, Shigefumi Odaohhara, Mitsuhiro Yamazaki
  • Patent number: 6016518
    Abstract: The present invention provides an apparatus that automatically designates a peripheral device as either a master or slave in response to the peripheral device connections when power is turned on. The apparatus comprises first and second connectors coupled to a master/slave designation means which provides a control signal to designate a peripheral device as a master.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: January 18, 2000
    Assignee: International Business Machines Corporation
    Inventors: Shinji Matsushima, Mitsuhiro Yamazaki