Patents by Inventor Mitsuhisa Narukawa

Mitsuhisa Narukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11476115
    Abstract: A method for manufacturing a compound semiconductor substrate comprises: a step to form an SiC (silicon carbide) layer on a Si (silicon) substrate, a step to form a LT (Low Temperature)-AlN (aluminum nitride) layer with a thickness of 12 nanometers or more and 100 nanometers or less on the SiC layer at 700 degrees Celsius or more and 1000 degrees Celsius or less, a step to form a HT (High Temperature)-AlN layer on the LT-AlN layer at a temperature higher than the temperature at which the LT-AlN layer was formed, a step to form an Al (aluminum) nitride semiconductor layer on the HT-AlN layer, a step to form a GaN (gallium nitride) layer on the Al nitride semiconductor layer, and a step to form an Al nitride semiconductor layer on the GaN layer.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: October 18, 2022
    Assignee: Air Water Inc.
    Inventors: Mitsuhisa Narukawa, Hiroki Suzuki, Sumito Ouchi
  • Patent number: 11316018
    Abstract: A compound semiconductor substrate includes a SiC (silicon carbide) layer, a AlN (aluminum nitride) buffer layer formed on the SiC layer, an Al (aluminum) nitride semiconductor layer formed on the AlN buffer layer, a composite layer formed on the Al nitride semiconductor layer, a GaN (gallium nitride) layer as an electron transition layer formed on the composite layer, and an Al nitride semiconductor layer as a barrier layer formed on the GaN layer. The composite layer includes C—GaN layers stacked in a vertical direction, and an AlN layer formed between the C—GaN layers.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: April 26, 2022
    Assignee: Air Water Inc.
    Inventors: Mitsuhisa Narukawa, Sumito Ouchi, Hiroki Suzuki, Keisuke Kawamura
  • Publication number: 20220077288
    Abstract: A compound semiconductor substrate has a Si (silicon) substrate, a first Al nitride semiconductor layer which is a graded layer formed on the Si substrate and whose Al concentration decreases as the distance from the Si substrate increases along the thickness direction, a GaN (gallium nitride) layer formed on the first Al nitride semiconductor layer and having a lower average Al concentration than the average Al concentration of the first Al nitride semiconductor layer, and a second Al nitride semiconductor layer formed on the GaN layer and having a higher average Al concentration than the average Al concentration of the GaN layer. The threading dislocation density at any position in the thickness direction within the second Al nitride semiconductor layer is lower than the threading dislocation density at any position in the thickness direction within the first Al nitride semiconductor layer.
    Type: Application
    Filed: December 10, 2019
    Publication date: March 10, 2022
    Inventors: Sumito OUCHI, Hiroki SUKUKI, Mitsuhisa NARUKAWA, Keisuke KAWAMURA
  • Publication number: 20220069090
    Abstract: A compound semiconductor substrate that can improve in-plane uniformity of current-voltage characteristics in the vertical direction is provided. A compound semiconductor substrate includes a center and an edge which is 71.2 millimeters away from the center when viewed in a plane. When a film thickness of the GaN layer at the center of the compound semiconductor substrate is W1 and a film thickness of the CaN layer at the edge is W2, film thickness error ?W represented by ?W (%)=W1?W2|*100/W1 is greater than 0 and 8% or less. The average carbon concentration in the depth direction at a center of the CaN layer is 3*1018 pieces/cm3 or more and 5*1020 pieces/cm3 or less. When a carbon concentration at a center position of the depth direction at the center of the GaN layer is concentration C1 and a carbon concentration at a center position of the depth direction at the edge of the GaN layer is concentration C2, concentration error ?C represented by ?C (%)=|C1?C2*100/C1 is 0 or more and 50% or less.
    Type: Application
    Filed: January 8, 2020
    Publication date: March 3, 2022
    Inventors: Hiroki SUZUKI, Sumito OUCHI, Mitsuhisa NARUKAWA, Keisuke KAWAMURA
  • Publication number: 20200402922
    Abstract: A compound semiconductor substrate in which the warpage can easily be controlled is provided. The compound semiconductor substrate comprises a SiC (silicon carbide) layer, an AlN (aluminum nitride) buffer layer formed on the SiC layer, and a lower composite layer formed on the AlN buffer layer, and an upper composite layer formed on the lower composite layer. The lower composite layer includes a plurality of lower Al (aluminum) nitride semiconductor layers vertically stacked and a lower GaN (gallium nitride) layer formed between the plurality of lower Al nitride semiconductor layers. The upper composite layer includes a plurality of upper GaN layers stacked vertically and an Al nitride semiconductor layer formed between the plurality of upper GaN layers.
    Type: Application
    Filed: December 6, 2018
    Publication date: December 24, 2020
    Inventors: Sumito OUCHI, Hiroki SUZUKI, Mitsuhisa NARUKAWA, Keisuke KAWAMURA
  • Publication number: 20200020778
    Abstract: A compound semiconductor substrate includes a SiC (silicon carbide) layer, a AlN (aluminum nitride) buffer layer formed on the SiC layer, an Al (aluminum) nitride semiconductor layer formed on the AlN buffer layer, a composite layer formed on the Al nitride semiconductor layer, a GaN (gallium nitride) layer as an electron transition layer formed on the composite layer, and an Al nitride semiconductor layer as a barrier layer formed on the GaN layer. The composite layer includes C—GaN layers stacked in a vertical direction, and an AlN layer formed between the C—GaN layers.
    Type: Application
    Filed: March 7, 2018
    Publication date: January 16, 2020
    Inventors: Mitsuhisa Narukawa, Sumito OUCHI, Hiroki Suzuki, Keisuke Kawamura
  • Publication number: 20190279864
    Abstract: A method for manufacturing a compound semiconductor substrate comprises: a step to form an SiC (silicon carbide) layer on a Si (silicon) substrate, a step to form a LT (Low Temperature)-AlN (aluminum nitride) layer with a thickness of 12 nanometers or more and 100 nanometers or less on the SiC layer at 700 degrees Celsius or more and 1000 degrees Celsius or less, a step to form a HT (High Temperature)-AlN layer on the LT-AlN layer at a temperature higher than the temperature at which the LT-AlN layer was formed, a step to form an Al (aluminum) nitride semiconductor layer on the HT-AlN layer, a step to form a GaN (gallium nitride) layer on the Al nitride semiconductor layer, and a step to form an Al nitride semiconductor layer on the GaN layer.
    Type: Application
    Filed: November 10, 2017
    Publication date: September 12, 2019
    Inventors: Mitsuhisa Narukawa, Hiroki Suzuki, Sumito Ouchi
  • Patent number: 10354864
    Abstract: A compound semiconductor substrate having a desired quality is provided. A compound semiconductor substrate has an SiC (silicon carbide) layer, an AlN (aluminum nitride) buffer layer formed on the SiC layer, an Al (aluminum) nitride semiconductor layer formed on the AlN buffer layer, a first GaN (gallium nitride) layer formed on the Al nitride semiconductor layer, a first AlN intermediate layer formed on the first GaN layer in contact with the first GaN layer, and a second GaN layer formed on the first AlN intermediate layer in contact with the first AlN intermediate layer.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: July 16, 2019
    Assignee: Air Water Inc.
    Inventors: Mitsuhisa Narukawa, Akira Fukazawa, Hiroki Suzuki, Keisuke Kawamura
  • Patent number: 10186421
    Abstract: A composite semiconductor substrate being able to improve voltage withstanding and crystalline quality is provided. A composite semiconductor substrate is equipped with an Si (silicon) substrate, an SiC (silicon carbide) layer formed on the surface of the Si substrate, an AlN (aluminum nitride) layer formed on the surface of the SiC layer, a composite layer formed on the surface of the AlN layer, and a GaN (gallium nitride) layer formed on the surface of the composite layer. The composite layer includes an AlN (aluminum nitride) layer and a GaN layer formed on the surface of the AlN layer. In at least one composite layer, the average density of C and Fe in the GaN layer is higher than the average density of C and Fe in the AlN layer.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: January 22, 2019
    Assignee: AIR WATER INC.
    Inventors: Akira Fukazawa, Mitsuhisa Narukawa, Keisuke Kawamura
  • Publication number: 20180277363
    Abstract: A compound semiconductor substrate having a desired quality is provided. A compound semiconductor substrate has an SiC (silicon carbide) layer, an AlN (aluminum nitride) buffer layer formed on the SiC layer, an Al (aluminum) nitride semiconductor layer formed on the AlN buffer layer, a first GaN (gallium nitride) layer formed on the Al nitride semiconductor layer, a first AlN intermediate layer formed on the first GaN layer in contact with the first GaN layer, and a second GaN layer formed on the first AlN intermediate layer in contact with the first AlN intermediate layer.
    Type: Application
    Filed: October 17, 2016
    Publication date: September 27, 2018
    Inventors: Mitsuhisa Narukawa, Akira Fukazawa, Hiroki Suzuki, Keisuke Kawamura
  • Publication number: 20180053647
    Abstract: A composite semiconductor substrate being able to improve voltage withstanding and crystalline quality is provided. A composite semiconductor substrate is equipped with an Si (silicon) substrate, an SiC (silicon carbide) layer formed on the surface of the Si substrate, an AlN (aluminum nitride) layer formed on the surface of the SiC layer, a composite layer formed on the surface of the AlN layer, and a GaN (gallium nitride) layer formed on the surface of the composite layer. The composite layer includes an AlN (aluminum nitride) layer and a GaN layer formed on the surface of the AlN layer. In at least one composite layer, the average density of C and Fe in the GaN layer is higher than the average density of C and Fe in the AlN layer.
    Type: Application
    Filed: January 14, 2016
    Publication date: February 22, 2018
    Applicant: AIR WATER INC.
    Inventors: Akira FUKAZAWA, Mitsuhisa NARUKAWA, Keisuke KAWAMURA
  • Patent number: 7629619
    Abstract: A Group III nitride-based compound semiconductor light-emitting device having a quantum well structure, includes a well layer, a first layer formed on one surface of the well layer, a second layer formed on the other surface of the well layer, a first region provided in the vicinity of the interface between the first layer and the well layer, and a second region provided in the vicinity of the interface between the second layer and the well layer. A composition of the first and second regions gradually changes such that the lattice constants of the first and second layers approach the lattice constant of the well layer as a position approaches said well layer.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: December 8, 2009
    Assignee: Toyota Gosei Co., Ltd.
    Inventors: Tetsuya Taki, Mitsuhisa Narukawa, Masato Aoki, Koji Okuno, Yusuke Toyoda, Kazuki Nishijima, Shuhei Yamada
  • Publication number: 20060273324
    Abstract: The back surface of a semiconductor crystal substrate 102 which has a thickness of about 150 ?m and is made of undoped GaN bulk crystal consists of a polished plane 102a which is flattened through dry-etching and a grinded plane 102b which is formed in a taper shape and is flattened through dry-etching. On about 10 nm in thickness of GaN n-type clad layer (low carrier concentration layer) 104, about 2 nm in thickness of Al0.005In0.045Ga0.95N well layer 51 and about 18 nm in thickness of Al0.12Ga0.88N barrier layer 52 are deposited alternately as an active layer 105 which emits ultraviolet light and has MQW structure comprising 5 layers in total. Before forming a negative electrode (n-electrode c) on the polished plane of the semiconductor substrate a, the polished plane is dry-etched.
    Type: Application
    Filed: July 26, 2004
    Publication date: December 7, 2006
    Inventors: Makoto Asai, Shiro Yamazaki, Takahiro Kozawa, Mitsuhisa Narukawa
  • Publication number: 20060169990
    Abstract: The invention relates to a Group III nitride-based compound semiconductor light-emitting device having a well layer, a first layer formed on one surface of the well layer, a second layer formed on the other surface of the well layer, a first region provided in the vicinity of the interface between the first layer and the well layer, and a second region provided in the vicinity of the interface between the second layer and the well layer, wherein the first and second regions are formed such that the lattice constants of the first and second layers approach the lattice constant of the well layer.
    Type: Application
    Filed: January 27, 2006
    Publication date: August 3, 2006
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Tetsuya Taki, Mitsuhisa Narukawa, Masato Aoki, Koji Okuno, Yusuke Toyoda, Kazuki Nishijima, Shuhei Yamada