Patents by Inventor Mitsunori Tamura

Mitsunori Tamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200164295
    Abstract: The invention addresses the problem of providing a filter fabric for a bag filter, which has excellent collection performance and low pressure drop and is resistant to a decrease in dust collection performance due to abrasion or cracking, and also a method for producing the same. Means for resolution is a filter fabric for a bag filter in which a nonwoven fabric A including short fibers a having a single-fiber fineness of 0.3 to 0.9 dtex, a base fabric, and a nonwoven fabric B including short fibers b having a single-fiber fineness of 0.3 to 4.0 dtex are laminated in this order.
    Type: Application
    Filed: January 24, 2018
    Publication date: May 28, 2020
    Applicant: TEIJIN FRONTIER CO., LTD.
    Inventors: Mitsunori TAMURA, Mie KAMIYAMA
  • Patent number: 6410881
    Abstract: The process for manufacturing an electronic circuit includes disposing an electronic device on a circuit substrate and hot melting a solder formed on the electronic device or the circuit substrate to bond the electronic device and the circuit substrate. The process includes the steps of feeding a liquid onto lands on the circuit substrate, aligning and mounting the electronic device on the lands, placing the circuit substrate in a treating vessel and heating the circuit substrate. The heating step includes controlling a pressure of an atmosphere in the treating vessel, hot-melting the solder to prevent at least a portion of the liquid from evaporating until the electronic device and the circuit substrate are bonded and to permit the liquid to evaporate after the electronic device and the circuit substrate are bonded.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: June 25, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Publication number: 20010039725
    Abstract: This invention provides a process for manufacturing electronic circuits, according to which soldering can be carried out without using flux by applying a metal surface treatment procedure which allows oxide film, organic matters, carbon or the like on the surface of metal to be easily removed without using complex process nor unfavorably affecting electronic devices or circuit substrates.
    Type: Application
    Filed: June 18, 2001
    Publication date: November 15, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Patent number: 6269998
    Abstract: The process for manufacturing an electronic circuit includes disposing an electronic device on a circuit substrate and hot melting a solder formed on the electronic device or the circuit substrate to bond the electronic device and the circuit substrate. The process includes the steps of feeding a liquid onto lands on the circuit substrate, aligning and mounting the electronic device on the lands, placing the circuit substrate in a treating vessel and heating the circuit substrate. The heating step includes controlling a pressure of an atmosphere in the treating vessel, hot-melting the solder to prevent at least a portion of the liquid from evaporating until the electronic device and the circuit substrate are bonded and to permit the liquid to evaporate after the electronic device and the circuit substrate are bonded.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: August 7, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Patent number: 6161748
    Abstract: The process for manufacturing an electronic circuit includes disposing an electronic device on a circuit substrate and hot melting a solder formed on the electronic device or the circuit substrate to bond the electronic device and the circuit substrate. The process includes the steps of feeding a liquid onto lands on the circuit substrate, aligning and mounting the electronic device on the lands, placing the circuit substrate in a treating vessel and heating the circuit substrate. The heating step includes controlling a pressure of an atmosphere in the treating vessel, hot-melting the solder to prevent at least a portion of the liquid from evaporating until the electronic device and the circuit substrate are bonded and to permit the liquid to evaporate after the electronic device and the circuit substrate are bonded.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: December 19, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Patent number: 6133135
    Abstract: The process for manufacturing an electronic circuit includes disposing an electronic device on a circuit substrate and hot melting a solder formed on the electronic device or the circuit substrate to bond the electronic device and the circuit substrate. The process includes the steps of feeding a liquid onto lands on the circuit substrate, aligning and mounting the electronic device on the lands, placing the circuit substrate in a treating vessel and heating the circuit substrate. The heating step includes controlling a pressure of an atmosphere in the treating vessel, hot-melting the solder to prevent at least a portion of the liquid from evaporating until the electronic device and the circuit substrate are bonded and to permit the liquid to evaporate after the electronic device and the circuit substrate are bonded.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: October 17, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Patent number: 5940728
    Abstract: A process for manufacturing electronic circuits, according to which soldering can be carried out without using flux by applying a metal surface treatment procedure which allows oxide film, organic matters, carbon or the like on the surface of metal to be easily removed without using a complex process nor unfavorably affecting electronic devices or circuit substrates. A process of connecting an electronic device and a circuit substrate by means of solder comprises the steps of irradiating the solder with a laser beam to clean the solder, aligning and mounting the electronic device on the circuit substrate, and hot-melting said solder in a low-oxygen content atmosphere to bond the electronic device and the circuit substrate.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: August 17, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Patent number: 5865365
    Abstract: A method of soldering used in fabricating an electronic circuit device employs an organic material supplied to at least one of the connecting members to be bonded. The connecting members are positioned in an oxidizing atmosphere, and heated in a nonoxidizing atmosphere to remove oxide and/or contamination layers present on the surface of presoldered portions or metallized bonding portions. By this method, fluxless soldering is performed, positional shifts are reduced, and high reliability of the soldering connections with reduction in residues after reflow are obtained.
    Type: Grant
    Filed: December 6, 1996
    Date of Patent: February 2, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Toru Nishikawa, Ryohei Satoh, Masahide Hara, Tetsuya Hayashida, Mitugu Shirai, Osamu Yamada, Hiroko Takehara, Yasuhiro Iwata, Mitsunori Tamura, Masahito Ijuin
  • Patent number: 5844311
    Abstract: There is disclosed a multichip module having a sealing-cooling structure which achieves a high packaging density, high sealing-connection reliability, a low manufacturing cost and a high cooling ability. A frame 15, conforming in thermal expansion coefficient to a substrate 11, is soldered at one surface thereof to that surface of the substrate 11 on which semiconductor devices 12 are mounted. The frame 15 is fastened or fixedly secured at the other surface thereof to a lid member 17 by bolts 10 or means without any heat treatment of the whole of the module.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: December 1, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Watanabe, Kenichi Kasai, Tositada Netsu, Hiroyuki Hidaka, Osamu Yamada, Mitsunori Tamura
  • Patent number: 5551148
    Abstract: A flexible film-like member having conductive metals filled in tapered holes extending through the thickness is positioned such that the holes of the member face to respective pad patterns on a circuit board on which bumps are to be formed, the conductive metals are then heated and fused so that they are joined and transferred to the pad patterns on the circuit board, and the film-like member is then removed by heating or cleaning liquid.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: September 3, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Kazui, Makoto Matsuoka, Hideyuki Fukasawa, Mitsunori Tamura, Mitsugu Shirai, Hideaki Sasaki