Patents by Inventor Mitsuo Nakazato

Mitsuo Nakazato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050169488
    Abstract: An improved acoustic characteristic adjustment device comprises signal processing units including high frequency convolution arithmetic sections, low frequency convolution arithmetic sections, and delay sections. The device further comprises: an operation section from which a listener inputs a target characteristic in order to adjust a desired acoustic characteristic; an impulse characteristic control section; and a delay time control section. The impulse characteristic control section calculates impulse response data to effect convolution arithmetics. The delay time control section calculates alignment delay times necessary for sounds emitted from the speakers to reach a listening position. The delay time control section also calculates correction times for compensating various phase deviations. Times obtained by correcting the alignment delay times with the correction times are set as the delay times of the delay sections, respectively.
    Type: Application
    Filed: December 30, 2004
    Publication date: August 4, 2005
    Inventors: Shinjiro Kato, Akira Shimizu, Moriyuki Oshima, Mitsuo Nakazato, Shigeki Kobayashi, Kunio Toyoda, Koji Takano, Shokichiro Hino, Tomohiko Endo, Kouichi Tsuchiya
  • Patent number: 5414386
    Abstract: A muting apparatus can mute sounds when a voltage drops even in a car audio system in which a digital audio signal is transmitted between audio components units. In the apparatus the drop of the voltage supplied to each of the audio component units is detected in each of the audio component units and, when the drop of the voltage is detected in any one of the audio component units, an analog audio signal is muted immediately before it is converted into an acoustic energy.
    Type: Grant
    Filed: February 15, 1994
    Date of Patent: May 9, 1995
    Assignee: Pioneer Electronic Corporation
    Inventors: Hiroo Adachi, Mitsuo Nakazato
  • Patent number: 5170081
    Abstract: The present invention relates to a ground isolation circuit for use in connecting electronic circuits at the pre-stage and the post-stage having signal lines assigned for a plurality of channels, wherein the interconnection of the two electronic circuits is performed by employing a shielded signal cable for each channel, discrete ground terminals are provided at either of the electronic circuits, one for each channel, and thereby each shielding braid of the shielded signal cable is connected independently to the discrete ground terminal with every channel. Accordingly, no loop circuit is formed through the shielding braids, thus resulting in no induced noise even if there is an interlinkage of external radiation noise with the shielding braids.
    Type: Grant
    Filed: October 24, 1991
    Date of Patent: December 8, 1992
    Assignee: Pioneer Electronic Corporation
    Inventors: Hiroo Adachi, Mitsuo Nakazato, Kouzo Nozawa, Toshiro Araki, Mutsuro Tanoue, Mitsumasa Watanabe