Patents by Inventor Mitsuru Nakada

Mitsuru Nakada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230107289
    Abstract: An information processing method of the present disclosure includes: performing processing to receive, on a predetermined coordinate system, input information including multiple scheduled points of shooting by a camera provided in a mobile body and information on respective camera attitudes at the multiple scheduled shooting points; and performing processing to create a prior trajectory of the mobile body on a basis of the received input information.
    Type: Application
    Filed: February 25, 2021
    Publication date: April 6, 2023
    Inventors: KEISUKE MAEDA, TATSUYA ISHIZUKA, MITSURU NAKADA, DAI KOBAYASHI
  • Patent number: 8264231
    Abstract: A switch circuit includes: a first charge/discharge circuit having a fixed first time constant; a second charge/discharge circuit having a second time constant associated with the operation statuses of a plurality of switches; first and second input/output ports to which the first and second charge/discharge circuits are connected, respectively; and a control section adapted to measure the first and second time constants by charging or discharging the first and second charge/discharge circuits and determine the operation statuses of a plurality of switches based on the ratio of the measured first and second time constants.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: September 11, 2012
    Assignee: Sony Corporation
    Inventors: Mitsuru Nakada, Masaaki Takesue
  • Publication number: 20100090746
    Abstract: A switch circuit includes: a first charge/discharge circuit having a fixed first time constant; a second charge/discharge circuit having a second time constant associated with the operation statuses of a plurality of switches; first and second input/output ports to which the first and second charge/discharge circuits are connected, respectively; and a control section adapted to measure the first and second time constants by charging or discharging the first and second charge/discharge circuits and determine the operation statuses of a plurality of switches based on the ratio of the measured first and second time constants.
    Type: Application
    Filed: September 3, 2009
    Publication date: April 15, 2010
    Applicant: Sony Corporation
    Inventors: Mitsuru NAKADA, Masaaki Takesue
  • Patent number: 7240178
    Abstract: A nonvolatile memory and a data rewriting method of the nonvolatile memory that can readily detect a state of operation at a time of a system failure due to a power failure or the like and quickly and reliably restore the nonvolatile memory to a normal storage state by a simple method. In the nonvolatile memory including a physical block as a storage unit, the physical block having a data area (1) and a redundant area (2), the redundant area (2) includes: a logical block address storing area (3) for storing an address of a corresponding logical block; a previously used physical block address storing area (4) for storing an address of a physical block to be erased; and a status information storing area (6) for storing status information for distinguishing a state of operation in each stage occurring in performing data rewriting operation on the physical block.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: July 3, 2007
    Assignee: Sony Corporation
    Inventors: Mitsuru Nakada, Mitsuhiko Tomita
  • Publication number: 20050036390
    Abstract: A nonvolatile memory and a data rewriting method of the nonvolatile memory that can readily detect a state of operation at a time of a system failure due to a power failure or the like and quickly and reliably restore the nonvolatile memory to a normal storage state by a simple method. In the nonvolatile memory including a physical block as a storage unit, the physical block having a data area (1) and a redundant area (2), the redundant area (2) includes: a logical block address storing area (3) for storing an address of a corresponding logical block; a previously used physical block address storing area (4) for storing an address of a physical block to be erased; and a status information storing area (6) for storing status information for distinguishing a state of operation in each stage occurring in performing data rewriting operation on the physical block.
    Type: Application
    Filed: July 19, 2002
    Publication date: February 17, 2005
    Inventors: Mitsuru Nakada, Mitsuhiko Tomita
  • Patent number: 6050276
    Abstract: There are disclosed an apparatus and method for cleaning a precision substrate through use of high-frequency- or ultrasonic-applied cleaning liquid. An object substrate is horizontally held and rotated. High-frequency- or ultrasonic-applied cleaning liquid is jetted toward the surface of the object substrate from first cleaning liquid jetting unit disposed above the object substrate, and the nozzle of the first cleaning liquid jetting unit is moved in parallel with the surface of the object substrate. Cleaning liquid is also fed toward the central portion of the surface of the object substrate from cleaning liquid feed-to-center unit during cleaning. In the cleaning apparatus and method, a sufficiently high cleaning speed is attained.
    Type: Grant
    Filed: February 12, 1998
    Date of Patent: April 18, 2000
    Assignee: Pre-Tech Co., Ltd.
    Inventors: Yasuyuki Harada, Mitsuru Nakada, Tadahiro Ohmi