Patents by Inventor Mitsuru Uesugi

Mitsuru Uesugi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6931238
    Abstract: Radio section 103 multiplies modulated transmission signals A to D respectively by a carrier with a frequency of fA, fB, fC or fD, thereby performs the frequency conversion, and outputs the resultant signals to switch 104. Switch 104 switches between frequency conversion sections fA to fD and between antennas A to D to connect, and timing control section 105 outputs a timing control signal to switching control section 107 at time intervals for which timer 106 is preset. Switching control section 107 controls the switching of switch 104 according to switching patterns which are preset in switching pattern storage section 108 and which are each indicative of a connection relationship between antennas A to D and frequency conversion sections fA to fD.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: August 16, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Junichi Aizawa, Osamu Kato, Mitsuru Uesugi, Takeshi Akiyama
  • Publication number: 20050164740
    Abstract: In order to perform appropriate reception quality control on each mobile station in a multimedia broadcast/multicast service, a layered coding section 101 encodes input data by dividing the input data into two layers and obtains a first layer code string and a second layer code string. The first layer code string is input to a CRC code addition section 102 and a CRC code for an error inspection is added thereto at every predetermined block. On the other hand, the second layer code string is input to a CRC code addition section 103 and a CRC code for an error inspection is added thereto at every predetermined block. The first layer code string and the second layer code string with the CRC codes added are input to a layered modulation section 104 and the layered modulation section 104 modulates a plurality of code strings coded by being divided into a plurality of layers in such away that error rates differ hierarchically among the plurality of code strings and a radio section 105 sends the modulated symbol.
    Type: Application
    Filed: July 3, 2003
    Publication date: July 28, 2005
    Inventors: Isamu Yoshii, Mitsuru Uesugi, Toshiyuki Uehara, Akihiko Nishio
  • Patent number: 6871046
    Abstract: Channel fluctuation estimating section 101 estimates fluctuation amount of the channel between transmitting apparatus 100 and receiving apparatus 200, and carrier number determining section 102 determines the number of subcarriers used in transmission of signal based on channel fluctuation amount. That is to say, in the case of a remarkably rapid channel fluctuation caused by fast fading, etc., carrier number determining section 102 deduces relatively the channel fluctuation between symbols or within a burst, by decreasing the subcarriers number and increasing symbol rate per one subcarrier.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: March 22, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keiichi Kitagawa, Mitsuru Uesugi
  • Publication number: 20040247038
    Abstract: A tap selection section 502 divides sampling signals r(i,0) through r(i,7) obtained from a received OFDM signal into sampling signals subject to correction and sampling signals not subject to correction, sends sampling signals subject to correction to an FIR filter 503, and sends sampling signals not subject to correction to an FTT 505. FIR filter 503 takes sampling signals as variable gain, and also has a Fourier transform known coefficient as input. An adaptive algorithm section 511 converges the values of sampling signals that include a distortion component comprising variable gain of FIR filter 503 to an optimal value so that error value e(i,k) due to distortion decreases.
    Type: Application
    Filed: May 5, 2004
    Publication date: December 9, 2004
    Inventors: Mitsuru Uesugi, Eiji Ota
  • Publication number: 20040248618
    Abstract: A radio communication system and scheduling method where, when data are transmitted from a plurality of transmit antennas to respective different mobile station apparatuses, all the mobile station apparatuses precisely receive data addressed thereto. A scheduler (104) performs scheduling that determines a data transmit order, depending on the numbers of receive antennas of the respective mobile station apparatuses, and notifies a transmit antennas assignment signal generator (124) of which transmit antenna is assigned which mobile station apparatus's sub-stream as the scheduling result. A number of receive antennas notifying signal decoder (122) decodes the number of receive antennas notifying signals and notifies the number of the receive antennas of each mobile station apparatus to the scheduler (104). The transmit antennas assignment signal generator (124) generates the transmit antennas assignment signal indicating which transmit antenna is assigned which mobile station apparatus's sub-stream.
    Type: Application
    Filed: March 5, 2004
    Publication date: December 9, 2004
    Inventors: Isamu Yoshii, Mitsuru Uesugi, Toshiyuki Uehara
  • Patent number: 6810096
    Abstract: Signal component converging section 105 delays received signal components spread on a time axis to combine signal components based on an output of propagation path estimating section 104, maximum value detecting section 106 detects a sample timing of a signal component with the maximum power among signal components combined in signal component converging section 105, and tap coefficient estimating section 107 estimates a tap coefficient that minimizes a mean square of a difference between a replica signal and a received signal while assigning a tap coefficient of a fixed value (for example, 1) to a sampling timing providing the maximum power, and outputs the estimated tap coefficient to FFF in plural array combining section 102 and a replica generating section in Viterbi equalizer 108.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: October 26, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshiko Saito, Mitsuru Uesugi
  • Patent number: 6804491
    Abstract: When a base station 205 employs frequencies f1, f2 and f3, repeaters 201 to 204 provided with filters passing only f1 are placed. According to this configuration, repeater apparatus causes only f1 to be passed to reach in the distance so as to enlarge cells 207 to 210 according to only specific channel (frequency f1).
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: October 12, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Mitsuru Uesugi
  • Publication number: 20040160987
    Abstract: A method and appparatus for setting a guard interval in an OFDM communication. The method includes attaching a part of a first valid symbol to the first valid symbol as a guard interval and attaching a part of a second valid symbol requiring higher channel quality than the first valid symbol, to the second valid symbol as a guard interval, and providing the guard interval of the second valid symbol at a length greater than the guard interval of the first valid symbol.
    Type: Application
    Filed: February 9, 2004
    Publication date: August 19, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd
    Inventors: Hiroaki Sudo, Mitsuru Uesugi
  • Publication number: 20040151258
    Abstract: The Viterbi calculation section 106 performs a Viterbi calculation by adding a branch metric to a path metric output from the metric selection section 105 and selecting a path having the smallest addition result and determines a surviving path having the smallest path metric and a second path having the second smallest path metric. The likelihood calculation section 107 compares each bit of the surviving path with the corresponding bit of the second path, sets lower likelihood for a bit having a different value than for a bit having the same value, and in this way calculates likelihood of each bit composing each symbol of the surviving path based on the relationship between the surviving path and the second path and further using mapping rules of the modulated signal. This makes it possible to calculate bit likelihood with a high degree of accuracy when demodulation is performed using Viterbi equalization to improve the error correcting capacity.
    Type: Application
    Filed: December 2, 2003
    Publication date: August 5, 2004
    Inventors: Yoshiko Saito, Mitsuru Uesugi
  • Patent number: 6763077
    Abstract: A switch 404 sends an output of a reception processing section 402 to a training processing section 405 at a training processing time and to a demodulation processing section 407 by control of a timing control section 403. The training processing section 405 passes received signals through FFFs for the respective branches to perform array combination at the training processing time. A tap coefficient converting section 406 converts the tap coefficient of FFF estimated by the training processing section 405 to calculate a weighting factor. The demodulation processing section 407 weights the received signals using the calculated weighting factor to combine, and passes the combined signal through FFF. This makes it possible to reduce the amount of operations at the array combining time.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: July 13, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshiko Saito, Mitsuru Uesugi
  • Patent number: 6726297
    Abstract: In a transmission section, which performs an OFDMA signal transmission, a plurality of serial signals is converted to parallel signals by a plurality of serial/parallel converters, the plurality of converted parallel signals are rearranged at intervals of a power of 2 by a rearranging apparatus, sub-carrier assignment is performed, and inverse Fourier transform is performed with respect to the number of sub-carriers, which has been varied depending on the number of rearranged parallel signals, so as to be changed to time waveforms. The transformed parallel signals are converted to serial signals by the parallel/serial converter, the converted serial signals are converted to analog signals by D/A converter and orthogonal modulator, thereafter converting the analog signals to high frequency signals so as to be emitted. This configuration allows the amount of operations and power consumption to be reduced.
    Type: Grant
    Filed: January 20, 2000
    Date of Patent: April 27, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Mitsuru Uesugi
  • Publication number: 20040062317
    Abstract: A replica generating section 109 creates replicas of path #3 and path #4 for effective symbol A. A convolutional operation section 111 finds an interference part by performing convolution of the impulse response in the path #3 and path #4 replicas. This interference part is output to a subtraction section 104. In the subtraction section 104, the interference part is subtracted from the next OFDM symbol. That is to say, an interference part is found using effective symbol A, and that interference part (the part that leaks into the range in which an FFT of effective symbol B is performed) is eliminated from effective symbol B. By this means, the occurrence of distortion in effective symbol B can be prevented.
    Type: Application
    Filed: April 30, 2003
    Publication date: April 1, 2004
    Inventors: Mitsuru Uesugi, Eiji Ota
  • Patent number: 6714511
    Abstract: The subtractor of the reception system calculates the channel quality using an optimal guard interval length detection signal inserted into one carrier by the transmission system, then the optimal guard interval length detector calculates the minimum guard interval length necessary to eliminate delayed signals using this calculated channel quality, inserts the control signal indicating this guard interval length into one carrier and the reception system sets the guard interval length using this control signal.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: March 30, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Sudo, Mitsuru Uesugi
  • Publication number: 20040048578
    Abstract: A CDMA radio transmission apparatus includes a spreader, a chip interleaver, and a transmitter. The spreader divides one symbol to a plurality of N chips equal to a number of a plurality of N slots contained in a frame, by spreading the one symbol by a spreading factor N equal to the number of the plurality of N slots contained in the frame. The chip interleaver performs a chip interleaving processing, whereby each of the plurality of N chips is equally assigned to each of the plurality of N slots. The transmitter operates to transmit the plurality of N slots in sequence.
    Type: Application
    Filed: April 21, 2003
    Publication date: March 11, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keiichi Kitagawa, Mitsuru Uesugi
  • Patent number: 6704345
    Abstract: The transmission/reception apparatus of the present invention, on its transmitting side, performs sweeping by sweep circuit 106 that changes with time the central frequency of a modulated signal according to a predetermined sweep pattern of frequency change controller 107 and then transmits the signal. On its receiving side, it detects a received signal while sweeping the central frequency with the same sweep pattern as that on the transmitting side created by frequency change controller 112. In this way, signals are transmitted correctly.
    Type: Grant
    Filed: March 9, 1999
    Date of Patent: March 9, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Mitsuru Uesugi
  • Publication number: 20040042386
    Abstract: An orthogonal variable spreading factor (OVSF) of one dimension represented by coding tree is extended into two dimensions and applied simultaneously in both directions, frequency axis direction and time axis direction when carrying out spreading of two dimensions of frequency axis direction and time axis direction. For example, the transmission data is first spread by OVSF code of one dimension in the frequency axis direction (obtained from frequency axis direction OVSF code assignment section 11), and the result is spread by OVSF code of one dimension in time axis direction (obtained from time axis direction OVSF code assignment section 13, which is selected independent of frequency axis direction) in each of two-dimensional spreading sections 1-1 to 1-8.
    Type: Application
    Filed: March 27, 2003
    Publication date: March 4, 2004
    Inventors: Mitsuru Uesugi, Kazunori Inogai, Atsushi Sumasu
  • Patent number: 6683863
    Abstract: A CDMA radio transmission apparatus includes a multiplexer that time-multiplexes variable data and fixed data. The variable data includes a quantity of data that is variable with respect to time and the fixed data includes a quantity of data that is fixed with respect to time. A randomizer randomizes a transmission timing of the fixed data by controlling a placement of the fixed data. A data quantity converter that converts the quantity of variable data.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: January 27, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyuki Miya, Mitsuru Uesugi
  • Patent number: 6636723
    Abstract: In a CDMA transmission, a quality of each symbol of a frame is held constant by interleaving spread chip, while overhead and interference amounts in other cells are reduced by easing a rate of transmission power control. Further, transmission power is decreased by discontinuing transmission at the time the quality is satisfied, thereby increasing the system capacity. Furthermore, it is possible to achieve more remarkable effect by performing inverse transmission power control.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: October 21, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keiichi Kitagawa, Mitsuru Uesugi
  • Publication number: 20030185179
    Abstract: Spreading factor determining section 104 increases spreading factor M of a spreading code to be generated in first spreading code generating section 102, as the ICI level increases. In other words, as deterioration increases in orthogonality among subcarriers in the frequency domain, the section 102 increases spreading factor M in the frequency domain. Further, as the ISI level increases, the section 102 increases spreading factor L of a spreading code to be generated in second spreading code generating section 103. In other words, as deterioration increases in orthogonality among subcarriers in the time domain, the section 102 increases spreading factor L in the time domain.
    Type: Application
    Filed: March 26, 2003
    Publication date: October 2, 2003
    Inventors: Kazunori Inogai, Mitsuru Uesugi, Atsushi Sumasu
  • Publication number: 20030179813
    Abstract: An averaging block (101) calculates a moving average of a correlation value calculated. A scale factor multiplication block (102) multiplies the correlation value which has been moving-averaged by a predetermined scale factor. An ideal correlation value generation block (103) calculates an ideal correlation value by using a reception signal in a line state having no level fluctuation due to fading fluctuation or no noise or no delayed wave and a known signal identical to a known signal contained in the reception signal. A time shifting block (104) outputs the ideal correlation value shifted on a temporal axis to a square error detection block (105). The square error detection block (105) detects a square error between the correlation value from the scale factor multiplication block (102) and the ideal correlation value from the time shifting block (104). A minimum error detection block (106) detects a minimum value of the detected square error, i.e., a minimum square error.
    Type: Application
    Filed: December 13, 2002
    Publication date: September 25, 2003
    Inventors: Minori Morita, Sadaki Futagi, Mitsuru Uesugi