Abstract: A semiconductor device includes an insulating layer, a semiconductor layer and a control electrode. The semiconductor layer is provided on the insulating layer and includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type and a third semiconductor region of a second conductivity type. The third semiconductor region is located between the first semiconductor region and the second semiconductor region. The first to third semiconductor regions are arranged in a first direction along an interface between the insulating layer and the semiconductor layer. The control electrode is provided on the semiconductor layer and includes first to third control parts arranged in the first direction. The first control part is located between the second control part and the third control part. The third semiconductor region is positioned between the insulating layer and the first control part.

Abstract: A semiconductor device includes an insulating layer, a semiconductor layer on the insulating layer, and a control electrode on the semiconductor layer. The semiconductor layer includes first and second semiconductor parts and a separation trench between the first and second semiconductor parts. The first and second semiconductor parts extending along the insulating film. The first semiconductor part includes first and second regions of a first conductivity type, and a fifth region of a second conductivity type between the first and second regions. The second semiconductor part includes third and fourth regions of the second conductivity type, and a sixth region of the second conductivity type between the third and fourth regions. The control electrode extends over the fifth and sixth regions. The semiconductor layer further including a seventh region of the second conductivity type at a bottom of the separation trench and electrically connecting the fifth and sixth regions.

Abstract: A high frequency transistor includes a first semiconductor layer, a first insulating film and a control electrode. The first semiconductor layer on the first insulating film extends in a first direction along an upper surface of the first insulating film. The first semiconductor layer has a first layer thickness in a second direction perpendicular to the upper surface, and a first width in a third direction orthogonal to the first direction. The first width is greater than the first layer thickness. The control electrode covers upper and side surfaces of the first semiconductor layer. The first semiconductor layer includes a first region of a first conductivity type, second and third regions of a second conductivity type. The first to third regions are arranged in the first direction. The first region is provided between the second and third region. The control electrode covers the first region.

Abstract: A high frequency transistor includes a first semiconductor layer, a first insulating film and a control electrode. The first semiconductor layer on the first insulating film extends in a first direction along an upper surface of the first insulating film. The first semiconductor layer has a first layer thickness in a second direction perpendicular to the upper surface, and a first width in a third direction orthogonal to the first direction. The first width is greater than the first layer thickness. The control electrode covers upper and side surfaces of the first semiconductor layer. The first semiconductor layer includes a first region of a first conductivity type, second and third regions of a second conductivity type. The first to third regions are arranged in the first direction. The first region is provided between the second and third region. The control electrode covers the first region.

Abstract: According to an embodiment, a process simulator has a layout processing unit to extract vertex coordinates of a first graphic of a layout of a semiconductor device described in a layout file used for a simulation, an initial mesh generation unit to generate a first initial mesh passing through the vertex coordinates in a plane direction of the layout, and a simulator unit to execute a process simulation of the semiconductor device based on simulation data in which a process flow of the semiconductor device is described, the layout, and the first initial mesh.

Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor substrate, a stacked body provided on the semiconductor substrate, a semiconductor pillar provided inside the stacked body, a charge storage film provided between the semiconductor pillar and an electrode film, a tunneling insulating film provided between the semiconductor pillar and the charge storage film, a blocking oxide provided between the charge storage film and the electrode film and a semiconductor member. The semiconductor member is provided between the tunneling insulating film and the semiconductor substrate, between the charge storage film and the semiconductor substrate, and between the blocking insulating film and the semiconductor substrate. A lower end of the charge storage film is positioned higher than a lower surface of a lower selection gate electrodes and positioned lower than an upper surface of the lower selection gate electrodes.

Abstract: According to an embodiment, a process simulator has a layout processing unit to extract vertex coordinates of a first graphic of a layout of a semiconductor device described in a layout file used for a simulation, an initial mesh generation unit to generate a first initial mesh passing through the vertex coordinates in a plane direction of the layout, and a simulator unit to execute a process simulation of the semiconductor device based on simulation data in which a process flow of the semiconductor device is described, the layout, and the first initial mesh.

Abstract: A semiconductor memory device includes a semiconductor substrate, a stacked body provided on the semiconductor substrate, a semiconductor pillar and an electrode member provided inside the stacked body, a charge storage film, and a control circuit. The stacked body includes insulating films and electrode films stacked alternately. The semiconductor pillar and the electrode member extend in a stacking direction and lower ends thereof are connected to the semiconductor substrate. The charge storage film is provided between the semiconductor pillar and one of the electrode films. The control circuit sets an upper end of the semiconductor pillar to a floating state, applies a first potential to the semiconductor substrate, applies a second potential to the electrode member, and applies a third potential to the one of the electrode films. The second potential is lower than the first potential. The third potential is lower than the second potential.

Abstract: A nonvolatile semiconductor memory device according to an embodiment includes a control unit, during the read sequence performed to an interested cell, performing a first read operation to detect that a threshold voltage of an adjacent cell is higher than a second reference voltage higher, performing a second read operation to detect that the threshold voltage of the interested cell is higher than a first reference voltage while applying a first bit line voltage to the adjacent bit line when threshold voltages of the adjacent cells are lower than the second reference voltage, and to detect that the threshold voltage of the interested cell is higher than the first reference voltage while applying a second bit line voltage higher than the first bit line voltage to the adjacent bit line when threshold voltages of the adjacent cells are higher than the second reference voltage, after the first read operation.

Abstract: A nonvolatile semiconductor storage device includes a plurality of memory cells arranged in a matrix in a memory cell region of a semiconductor substrate; a peripheral circuit disposed in a peripheral circuit region outside the memory cell region and configured to read data from and write data to the memory cells; and a word line transfer transistor provided in the peripheral circuit and having a gate electrode above the semiconductor substrate via a gate insulating film and two impurity diffusion regions provided in two sides of the gate electrode, the word line transfer transistor being configured to supply a voltage to a word line connecting the memory cells; wherein among the two impurity diffusion regions of the word line transfer transistor, a level of a surface position of the semiconductor substrate in one impurity diffusion region is lower than a level of a surface position of the semiconductor substrate in the other impurity diffusion region.

Abstract: Provided is a non-volatile semiconductor storage device including a memory cell which is disposed on a semiconductor substrate and where a control gate electrode is disposed on a charge storage layer, a select gate transistor where a select gate electrode is disposed between a source region and a drain region and which shares the source region with the memory cell, a first air gap which is disposed between the charge storage layers and between the source regions adjacent to each other in a word line direction and which is formed continuously over the memory cell and the select gate transistor adjacent to each other in a bit line direction so as to be concealed under the word line and under the select gate electrode, and a back-filling insulating film which back-fills an air gap between the drain electrodes adjacent to each other in the word line direction.

Abstract: An image forming method comprising the step of: forming a toner image employing toner particles containing at least a resin on an image supporting substrate having thereon a toner holding layer via a toner image holding process to form an image print, the toner image being held in the toner holding layer in the toner image holding process, wherein at least the toner particles or the image supporting substrate is separated from the image print via a separation process; and at least the separated toner particles or the separated image supporting substrate is recyclable as an image forming material.

Abstract: Provided is a non-volatile semiconductor storage device including a memory cell which is disposed on a semiconductor substrate and where a control gate electrode is disposed on a charge storage layer, a select gate transistor where a select gate electrode is disposed between a source region and a drain region and which shares the source region with the memory cell, a first air gap which is disposed between the charge storage layers and between the source regions adjacent to each other in a word line direction and which is formed continuously over the memory cell and the select gate transistor adjacent to each other in a bit line direction so as to be concealed under the word line and under the select gate electrode, and a back-filling insulating film which back-fills an air gap between the drain electrodes adjacent to each other in the word line direction.

Abstract: A method of recycling an image forming material comprising the steps of holding a toner image formed by employing toner particles in a toner holding layer formed on an image supporting substrate to form a first generation image print, separating the toner particles from the first generation image print; and recycling the separated toner particles to form a second generation image print by holding a toner image formed by employing the separated toner particles in a toner holding layer formed on an image supporting substrate, provided that the image forming material comprises at least toner particles, wherein Condition (1) 0.9?B/A?0.1 and Condition (2) 1?C/A?0.9 are satisfied, A, B and C representing particle shape factors of original toner particles, toner particles held in the image holding layer of the first generation image print; and separated toner particles, respectively.

Abstract: Disclosed is an image print which has a toner-holding layer on an image-supporting substrate in which the toner-holding layer holds a toner image formed by toner particles, wherein the toner-holding layer is composed of a hydrogel having a water content of 10% by mass or more and not more than 90% by mass.

Abstract: An image forming method using toner comprising toner particles having a core-shell structure comprising a core particle incorporating a viscous material and a shell layer covering the above core particle is disclosed. The method comprises steps of a toner image forming step on a dielectric drum; a first pressure applying step in which the shell layer of the toner particles forming the toner image is subjected to a preliminary break treatment by a first pressure roller, which is arranged in contact with the dielectric drum; and a transfer/fixing step in which a toner image made by the toner particles which have been subjected to a preliminary break treatment by the first pressure applying step is transferred and fixed to an image support by a second pressure roller which is arranged in contact with the dielectric drum.

Abstract: Provided is a display member containing: an display layer which exhibits a structural color and contains spherical bodies and a matrix; and a reflective interface which reflects a light transmitting through the display layer, wherein the reflective interface is made between the display layer and a reflective interface forming layer which is provided in contact with the display layer; and a refractive index of the spherical bodies na, a refractive index of the matrix nb and a refractive index of the reflective interface forming layer nc satisfy the following Formulas (1) and (2): 0.35<nc/na<1.00,??Formula (1) 0.35<nc/nb<1.00.

Abstract: An image forming method for forming an image printed matter, includes the steps of: forming a toner image with toner particles on a photoreceptor; transferring the toner image from the photoreceptor onto a substrate; laminating an toner holding material layer on the substrate so as to embed the toner image in the toner holding material layer so that the toner holding material layer holds the toner image therein and the image printed matter is formed, wherein the toner holding material layer is composed of a gel including a liquid dispersion medium having a contact angle of 20 to 110 degrees to the image supporting substrate.

Abstract: Disclosed is an image print which has a toner-holding layer on an image-supporting substrate in which the toner-holding layer holds a toner image formed by toner particles, wherein the toner-holding layer is composed of a hydrogel having a water content of 10% by mass or more and not more than 90% by mass.

Abstract: Disclosed is a method of preparing hollow particles comprising polymerizing a hydrophobic monomer to form a particulate resin exhibiting a number average molecular weight of from 20,000 to 500,000, dispersing the particulate resin in an aqueous medium to form a resin particle dispersion and adding thereto a hydrophobic cross-linkable monomer in an amount of from 0.1 to 50 parts by mass based on 1 part by mass of the particulate resin to polymerize the cross-linkable monomer to form hollow particles.