Abstract: A solid-state imaging device including: light-receiving units which are formed in rows and columns; a transfer channel formed in each column; first and second transfer electrodes that are formed in the same layer and deposited alternately above the transfer channel; insulating regions each formed above the transfer channel and between one of the first transfer electrodes and one of the second transfer electrodes which are adjacent to each other; an antireflection film formed above the light-receiving units, and formed on the insulating regions to cover the insulating regions; a first wire formed in each row in a layer upper than the antireflection film, and electrically connected to second transfer electrodes; and a light-shielding film which is formed in a layer upper than the first wire, covers the transfer channel, and has an opening above each of the light-receiving units.

Abstract: A solid-state imaging element having high sensitivity and low smear in miniaturization is provided. The solid-state imaging element includes: a photoelectric conversion unit; a read-out unit; a charge transferring unit; a charge transfer electrode formed over the charge transferring unit; shielding film formed over the charge transfer electrode and has an opening part over the photoelectric conversion unit; and anti-reflection film formed (i) in the opening part, and (ii) over the charge transfer electrode. A first edge, of the to anti-reflection film formed in the opening part, stops protruding before reaching spacing found under the shielding film. A second edge, of the anti-reflection film formed over the charge transfer electrode, stops protruding before covering a side wall of the charge transfer electrode. The first edge faces the side wall of the charge transfer electrode, and the second edge protrudes in a read-out direction of the charge.

Abstract: A solid-state imaging device including: light-receiving units which are formed in rows and columns; a transfer channel formed in each column; first and second transfer electrodes that are formed in the same layer and deposited alternately above the transfer channel; insulating regions each formed above the transfer channel and between one of the first transfer electrodes and one of the second transfer electrodes which are adjacent to each other; an antireflection film formed above the light-receiving units, and formed on the insulating regions to cover the insulating regions; a first wire formed in each row in a layer upper than the antireflection film, and electrically connected to second transfer electrodes; and a light-shielding film which is formed in a layer upper than the first wire, covers the transfer channel, and has an opening above each of the light-receiving units.

Abstract: A stacked gate portion, including a tunnel insulating film, a floating gate electrode, a capacitive insulating film and a control gate electrode, is formed over a p-type Si substrate. In the p-type Si substrate, n++ source/drain layers and n+ source/drain layers, each layer containing arsenic, are formed. In the drain region, an n− drain layer, containing phosphorus and overlapping with an entire edge of the stacked gate portion in the gate width direction, and a p layer surrounding the bottoms of the n+ and the n− drain layers are provided. In such a structure, an electric field applied between the floating gate electrode and the drain is weakened and the drain-disturb characteristics are improved during writing.

Abstract: A method for fabricating a nonvolatile semiconductor memory device having a stacked gate portion, including a tunnel insulating film, a floating gate electrode, a capacitive insulating film and a control gate electrode, formed over a p-type Si substrate. In the p-type Si substrate, n.sup.++ source/drain layers and n.sup.+ source/drain layers, each layer containing arsenic, are formed. In the drain region, an n.sup.- drain layer, containing phosphorus and overlapping with an entire edge of the stacked gate portion in the gate width direction, and a p layer surrounding the bottoms of the n.sup.+ and the n.sup.- drain layers are provided. In such a structure, an electric field applied between the floating gate electrode and the drain is weakened and the drain-disturb characteristics are improved during writing.