Patents by Inventor Mitsuyuki Takada

Mitsuyuki Takada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5773879
    Abstract: The semiconductor package and manufacturing method thereof whereby the inexpensive package of high thermal conductivity is obtained by applying a Cu/Mo/Cu clad material for a base plate which matches the thermal expansion of a semiconductor chip, and the inexpensive package with high heat transfer suitable for a high frequency device is obtained by controlling a thickness of glass, and a size of a lead (width, thickness), thereby to match impedance of a wiring portion with that of the semiconductor chip, by plating only necessary areas with Au, and by plating the exterior with Sn.
    Type: Grant
    Filed: February 9, 1993
    Date of Patent: June 30, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tosihiro Fusayasu, Kenji Kagata, Hirotugu Yamada, Isao Kitamura, Masanobu Kohara, Mitsuyuki Takada
  • Patent number: 5672965
    Abstract: An evaluation board for evaluating electrical characteristics of an IC package has an electrically insulating support board having signal wire patterns for contact by a measurement probe formed on a first surface and mounting pads for contact with solder balls of an IC package formed on a surface. The signal wire patterns and the mounting pads are electrically connected with each other via through holes formed in the support board. The signal wire patterns are surrounded by and spaced from a ground pattern formed on the first surface.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 30, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuhiko Kurafuchi, Hiroshi Seki, Mitsuyuki Takada
  • Patent number: 5459594
    Abstract: An apparatus for ON-OFF inspection on a scattering-type liquid crystal display panel is provided which is of decreased size and is capable of easily inspecting the ON-OFF states of the liquid crystal display panel by assuring enhanced visuality of an image displayed for inspection. The inspection apparatus includes: support means for supporting the liquid crystal display panel; signal applying means for applying an electric signal to a pixel of the liquid crystal display panel; illumination means for illuminating the liquid crystal display panel, the illumination means comprising a flat photoconductive member and a light source mounted on a side wall of the photoconductive member; a light-absorptive layer disposed on one side of the photoconductive member with a gap therebetween; and means for making the other side of the photoconductive member come into close contact with the liquid crystal display panel.
    Type: Grant
    Filed: September 20, 1994
    Date of Patent: October 17, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kunifumi Nakanishi, Masaaki Nakano, Mitsuyuki Takada, Eishi Gofuku, Mutsuhiro Shima, Toshio Ohnawa, Hirofumi Ouchida
  • Patent number: 5175399
    Abstract: Disclosed herein is a wiring panel constructed with a substrate; an electrically conductive member laminated on the substrate and principally composed of copper; and an insulating member composed of an organic substance, wherein a very small amount of a non-metallic element is incorporated into the electrically conductive member, and a very small amount of a metal element is incorporated into the insulating member.Also disclosed herein is a method for producing a wiring panel constructed with a substrate, an electrically conductive member provided on the substrate and composed of copper as the principal constituent, and an insulating layer of an organic substance covering the conductive member, which comprises steps of: applying onto the surface of the electrically conductive member a surface-reforming layer which functions to suppress electron transfer through the surface of the electrically conductive member, and thereafter forming the organic insulating layer on the electrically conductive member.
    Type: Grant
    Filed: August 27, 1990
    Date of Patent: December 29, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsumasa Mori, Eishi Gofuku, Mitsuyuki Takada, Kurumi Miyake, Yoshiyuki Morihiro, Masanobu Kohara
  • Patent number: 5173844
    Abstract: A circuit board includes a copper plate and an insulating layer of photosensitive polyimide resin formed on the copper plate, the insulating layer leaving an exposed portion of a surface of the copper plate where an LSI is to be mounted. After Au plating is applied to the exposed surface of the copper plate, the LSI is mounted fixedly. A connection pattern having bonding pads is formed by copper plating on the insulating layer. The bonding pads and the LSI are connected by Au wire bonding on the Au plating applied on the bonding pads.
    Type: Grant
    Filed: November 19, 1991
    Date of Patent: December 22, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kohei Adachi, Mitsuyuki Takada, Atsushi Endo, Eishi Gofuku, Hayato Takasago
  • Patent number: 5081562
    Abstract: A circuit board includes a copper plate and an insulating layer of photosensitive polyimide resin formed on the copper plate, the insulating layer leaving an exposed portion of a surface of the copper plate where an LSI is to be mounted. After Au plating is applied to the exposed surface of the copper plate, the LSI is mounted fixedly. A connection pattern having bonding pads is formed by copper plating on the insulating layer. The bonding pads and the LSI are connected by Au wire bonding on the Au plating applied on the bonding pads.
    Type: Grant
    Filed: June 19, 1990
    Date of Patent: January 14, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kohei Adachi, Mitsuyuki Takada, Eishi Gofuku, Hayato Takasago, Atsushi Endo
  • Patent number: 5069745
    Abstract: A process for preparing a combined wiring substrate is carried out by bonding with an adhesive agent the end surfaces of the mutually opposing sides of a plurality of substrates each having a pattern of wiring on its major surface, and by connecting electrically parts of the pattern of wiring which oppose each other by interposing the bonding portion.
    Type: Grant
    Filed: August 24, 1990
    Date of Patent: December 3, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Ohuchida, Eishi Gofuku, Hayato Takasago, Akira Ishizu, Toshio Tobita, Mitsuyuki Takada
  • Patent number: 5059941
    Abstract: A resistor device includes a thick-film resistor which includes a mixture of electrical conductive material and glass, and which has the electrical conductive material at a surface portion exposed; and electrodes which are deposited on the thick-film resistor to be connected to the exposed electrical conductive material.
    Type: Grant
    Filed: September 19, 1990
    Date of Patent: October 22, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eishi Gofuku, Mitsuyuki Takada
  • Patent number: 4993148
    Abstract: A method is provided for forming a circuit board which comprises a copper plate and an insulating layer of photosensitive polyimide resin formed on the copper plate, the insulating layer leaving an exposed portion of a surface of the copper plate where an LSI is to be mounted. After Au plating is applied to the exposed surface of the copper plate, the LSI is mounted fixedly. A connection pattern having bonding pads is formed by copper plating on the insulating layer. The bonding pads and the LSI are connected by Au wire bonding on the Au plating applied on the bonding pads.
    Type: Grant
    Filed: September 12, 1989
    Date of Patent: February 19, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kohei Adachi, Mitsuyuki Takada, Atsushi Endo, Eishi Gofuku, Hayato Takasago
  • Patent number: 4963389
    Abstract: A method for producing a high density hybrid integrated circuit substrate capable of forming a very fine pattern of a conductor by means of the chemical plating and at the same time capable of applying the chemical plating, while protecting the resistor formed on the substrate in advance of the chemical plating step, the production method comprising steps of: forming a resistor on an electrically insulating substrate; forming an activating layer for depositing a chemical plating on the electrically insulating substrate in contact with the resistor; forming a stable resin layer, during the chemical plating step, by the photolithography process in a manner to cover the resistor, except for the portion of the activating layer where an electrically conductive layer is to be formed; and forming the electrically conductive layer by the chemical plating on the exposed portion of the activating layer.
    Type: Grant
    Filed: January 6, 1989
    Date of Patent: October 16, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Ryusaku Tsukao, Hayato Takasago
  • Patent number: 4946709
    Abstract: A method for fabricating a hybrid IC substrate comprises the steps of: preparing an insulating ceramic substrate having a major surface; baking one or more conductors of a first group formed of high melting point metal or alloy thereof on the major surface; covering the conductors of the first group with a first plated film formed by electroless plating; forming an insulating porous active including a glass component and a small amount of a metal component having a catalytic action for electroless plating on the first plated film; and forming one or more conductors of a second group by electroless plating on the active layer, whereby portions of the active layer sandwiched between the conductors of the first and second groups are rendered conductive.
    Type: Grant
    Filed: August 17, 1989
    Date of Patent: August 7, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Eishi Gofuku, Hayato Takasago
  • Patent number: 4942140
    Abstract: In a method of packaging a semiconductor device, the semiconductor device and a mounting body are positioned in such a manner that electrodes of the semiconductor device and leads of the mounting body are brought into slidable mechanical contact with each other, the electrodes being not bonded to the leads. Next, an insulating resin that shrinks on setting is supplied in such a manner that the contacted portions of the electrodes and the leads are covered. Subsequently, the resin is set while keeping the electrodes and the leads in contact with each other to bond the electrodes to the leads whereby the resin, when set, applies a compressive force between the electrodes and the leads.
    Type: Grant
    Filed: June 9, 1989
    Date of Patent: July 17, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hideaki Ootsuki, Mitsuyuki Takada, Toru Kokogawa, Hayato Takasago
  • Patent number: 4914815
    Abstract: In a method for manufacturing hybrid integrated circuits, a plurality of circuit patterns are formed on one surface of a board, and a connecting film is stuck onto the other surface of the board. Then, the board is divided into portions having the respective circuit patterns while leaving the connecting film intact and component parts are mounted on the portions. Finally, the individual portions are separated by cutting the connecting film. The circuit patterns may be formed over one surface of the board and covered with a connecting film. The connecting film may be a constituent element of each circuit pattern, such as an insulating layer disposed between conducting layers.
    Type: Grant
    Filed: February 21, 1989
    Date of Patent: April 10, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Hayato Takasago, Yoshiyuki Morihiro
  • Patent number: 4898805
    Abstract: A method for fabricating a hybrid IC substrate comprises the steps of baking a conductor of a first group on an insulating ceramic substrate, forming an insulating porous active layer including a glass component and a small amount of a metal component having a catalytic action for electroless plating, forming a resist pattern on the active layer by using a photomask, and forming a conductor of a second group by electroless plating on a portion of the active layer not covered with the resist, whereby a portion of the active layer sandwiched between the conductors of the first and second groups is rendered conductive and a portion of the active layer in direct contact with the insulating substrate is maintained as an insulator.
    Type: Grant
    Filed: July 25, 1988
    Date of Patent: February 6, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Hayato Takasago, Yoichiro Onishi
  • Patent number: 4785157
    Abstract: A method for controlling electric resistance of a compound-type resistant material is disclosed in which a laser beam is irradiated on a compound-type resistant material so as to cause a change in its chemical state whereby the specific resistance inherent to the compound-type resistant material is varied thereby to change its electric resistance in an appropriate manner. If necessary, a portion of the resistant material may be cut away by irradiation of a laser beam so as to further control the resistance value of the resistant material in an increasing sense.
    Type: Grant
    Filed: January 7, 1987
    Date of Patent: November 15, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eishi Gofuku, Mitsuyuki Takada, Hayato Takasago
  • Patent number: 4783642
    Abstract: A hybrid integrated circuit substrate contains an insulating substrate. On predetermined positions of the upper surface of the substrate, there are formed resistors and activation layers to be in contact with ends of the resistors. On predetermined positions of the upper surfaces of the activation layers, there are formed conductor layers electrically connected with the ends of the resistors.
    Type: Grant
    Filed: May 13, 1987
    Date of Patent: November 8, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Yoshiyuki Morihiro, Hayato Takasago
  • Patent number: 4752555
    Abstract: A first conductor layer made of a thick film conductor is formed with a predetermined pattern on a substrate. A thick film resistor is then formed to be connected to the first conductor layer. An insulating layer made of a polyimide resin is formed over the substrate, the first conductor layer and the thick film resistor with through holes on the first conductor layer. Then, plating is applied to the whole surface of the insulating layer, the wall surfaces of the through holes and the exposed portions of the first conductor layer and etching is applied thereto with a predetermined pattern so that a second conductor layer is formed.
    Type: Grant
    Filed: May 27, 1986
    Date of Patent: June 21, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Yoshiyuki Morihiro, Havato Takasago
  • Patent number: 4685203
    Abstract: A hybrid integrated circuit substrate comprising an insulating substrate. On predetermined positions of the upper surface of the substrate, there are formed cermet resistors and activation layers to be in contact with ends of the resistors. On predetermined positions of the upper surface of the activation layers, there are formed conductor layers electrically connected with the ends of the resistors through the activation layers. The activation layers are formed from an activation paste containing a catalytic metal for enabling deposition in electroless plating in glass ingredients for attaining adhesion with the insulating substrate upon firing. Electrical connection between the conductor layers and the cermet resistors occurs through the activation layers by ohmic contact effected between the cermet resistors and the conductor layers through diffusion layers formed upon firing the activation paste.
    Type: Grant
    Filed: August 1, 1984
    Date of Patent: August 11, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Yoshiyuki Morihiro, Hayato Takasago
  • Patent number: 4645734
    Abstract: In manufacturing a composite having a conductive layer on the surface of a resin layer, the first resin layer of polyimide is formed on a substrate of alumina ceramic and, after a resin layer is thermally set by heating, a second resin layer of polyimide is then formed on the first resin layer and is dried. Then the surface of the second resin layer is subjected to selective photoetching by using a photomask having predetermined small opaque areas distributed, thereby to form unevenness including concaves formed as a result of the selective photoetching. The layered composite thus obtained is then heated so that the second resin layer is thermally set. Then catalyst nuclei are formed for electroless plating on the etched surface having the unevenness formed and then a conductive metallic layer is formed by an electroless plating process on the etched surface having the unevenness formed. As a result, a composite of the above described structure is provided.
    Type: Grant
    Filed: April 23, 1985
    Date of Patent: February 24, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Atsushi Endo, Hayato Takasago
  • Patent number: 4643798
    Abstract: In manufacturing a composite having a conductive layer on the surface of a resin layer, first the resin layer of a mixture of a resin material and filler elements is formed on a substrate and the resin material of the surface of the resin layer is selectively etched with respect to the filler elements to expose a portion of the filler elements, and then the filler elements, as exposed on the selectively etched surface of the resin layer, are selectively etched with respect to the resin material to form unevenness. Then catalyst nuclei are formed for electroless plating on the selectively etched surface having the unevenness and then a conductive metallic layer is formed by an electroless plating process on the selectively etched surface having unevenness. As a result, a composite of the above described structure is provided.
    Type: Grant
    Filed: April 9, 1985
    Date of Patent: February 17, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Yoshiyuki Morihiro, Hayato Takasago