Patents by Inventor Miyako Matsui

Miyako Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240047239
    Abstract: The plasma processing device according to the present invention includes a processing chamber in which a sample is plasma processed, a radio frequency power supply which supplies radio frequency power for generating plasma, and a sample stand on which the sample is placed. The plasma processing device includes a control device which measures a thickness of a protective film selectively formed on a desired material of the sample using an interference light reflecting from the sample which has been irradiated with an ultraviolet-ray, or determines selectivity of the protective film using the interference light reflecting from the sample which has been irradiated with the ultraviolet-ray.
    Type: Application
    Filed: December 16, 2020
    Publication date: February 8, 2024
    Inventors: Miyako Matsui, Tatehito Usui, Kenichi Kuwahara
  • Patent number: 11875978
    Abstract: A plasma processing apparatus 1 that performs, on a wafer 16 in which a multilayer film in which an insulating film and a film to be processed containing a metal are alternately laminated is formed on a substrate, plasma etching of the film to be processed, includes: a processing chamber 10 which is disposed inside a vacuum container; a sample stage 14 which is disposed inside the processing chamber and on which the wafer is placed; a detection unit 28 which detects reflected light obtained by the wafer reflecting light emitted to the wafer; a control unit 40 which controls plasma processing on the wafer; and an end point determination unit 30 which determines an etching end point of the film to be processed based on a change in an amplitude of vibration in a wavelength direction of a light spectrum of the reflected light, and the control unit receives determination of the end point made by the end point determination unit and stops the plasma processing on the wafer.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: January 16, 2024
    Assignee: Hitachi High-Tech Corporation
    Inventors: Tsubasa Okamoto, Tatehito Usui, Miyako Matsui, Shigeru Nakamoto, Naohiro Kawamoto, Atsushi Sekiguchi
  • Publication number: 20230096723
    Abstract: A plasma processing apparatus 1 that performs, on a wafer 16 in which a multilayer film in which an insulating film and a film to be processed containing a metal are alternately laminated is formed on a substrate, plasma etching of the film to be processed, includes: a processing chamber 10 which is disposed inside a vacuum container; a sample stage 14 which is disposed inside the processing chamber and on which the wafer is placed; a detection unit 28 which detects reflected light obtained by the wafer reflecting light emitted to the wafer; a control unit 40 which controls plasma processing on the wafer; and an end point determination unit 30 which determines an etching end point of the film to be processed based on a change in an amplitude of vibration in a wavelength direction of a light spectrum of the reflected light, and the control unit receives determination of the end point made by the end point determination unit and stops the plasma processing on the wafer.
    Type: Application
    Filed: June 16, 2020
    Publication date: March 30, 2023
    Inventors: Tsubasa Okamoto, Tatehito Usui, Miyako Matsui, Shigeru Nakamoto, Naohiro Kawamoto, Atsushi Sekiguchi
  • Patent number: 11462416
    Abstract: Provided is a plasma processing method for plasma etching an etching target film formed on a sample. The method includes a protective film forming step of selectively forming a protective film on an upper portion of a pattern formed on the sample and adjusting a width of the formed protective film such that a distribution of the width of the formed protective film in a surface of the sample becomes a desired distribution, and a step of plasma etching the etching target film after the protective film forming step.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: October 4, 2022
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Miyako Matsui, Kenichi Kuwahara, Tatehito Usui, Hiroyuki Kobayashi
  • Patent number: 10971369
    Abstract: In cycle etching in which a depo process and an etching process are repeated, a depo film thickness over a pattern is controlled precisely, and etching is executed to have a desired shape stably for a long time.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: April 6, 2021
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Miyako Matsui, Tatehito Usui, Masaru Izawa, Kenichi Kuwahara
  • Publication number: 20200335354
    Abstract: Provided is a plasma processing method for plasma etching an etching target film formed on a sample. The method includes a protective film forming step of selectively forming a protective film on an upper portion of a pattern formed on the sample and adjusting a width of the formed protective film such that a distribution of the width of the formed protective film in a surface of the sample becomes a desired distribution, and a step of plasma etching the etching target film after the protective film forming step.
    Type: Application
    Filed: December 17, 2019
    Publication date: October 22, 2020
    Inventors: Miyako Matsui, Kenichi Kuwahara, Tatehito Usui, Hiroyuki Kobayashi
  • Patent number: 10665516
    Abstract: The present invention relates to an etching method including a reaction layer forming step of forming a reaction layer by adsorption of a gas on a surface of an etching target material, a desorption step of desorbing the reaction layer after the reaction layer forming step, and a removal step of removing the reaction layer or a deposited film, characterized in that the surface of the etching target material is etched by the reaction layer forming step and the desorption step.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: May 26, 2020
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Miyako Matsui, Kenichi Kuwahara, Naoki Yasui, Masaru Izawa, Tatehito Usui, Takeshi Ohmori
  • Patent number: 10622269
    Abstract: The present invention relates to an etching method including a reaction layer forming step of forming a reaction layer by adsorption of a gas on a surface of an etching target material, a desorption step of desorbing the reaction layer after the reaction layer forming step, and a removal step of removing the reaction layer or a deposited film, characterized in that the surface of the etching target material is etched by the reaction layer forming step and the desorption step.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: April 14, 2020
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Miyako Matsui, Kenichi Kuwahara, Naoki Yasui, Masaru Izawa, Tatehito Usui, Takeshi Ohmori
  • Publication number: 20190237337
    Abstract: In cycle etching in which a depo process and an etching process are repeated, a depo film thickness over a pattern is controlled precisely, and etching is executed to have a desired shape stably for a long time.
    Type: Application
    Filed: January 31, 2018
    Publication date: August 1, 2019
    Inventors: Miyako MATSUI, Tatehito USUI, Masaru IZAWA, Kenichi KUWAHARA
  • Publication number: 20180269118
    Abstract: The present invention relates to an etching method including a reaction layer forming step of forming a reaction layer by adsorption of a gas on a surface of an etching target material, a desorption step of desorbing the reaction layer after the reaction layer forming step, and a removal step of removing the reaction layer or a deposited film, characterized in that the surface of the etching target material is etched by the reaction layer forming step and the desorption step.
    Type: Application
    Filed: August 30, 2017
    Publication date: September 20, 2018
    Inventors: Miyako MATSUI, Kenichi KUWAHARA, Naoki YASUI, Masaru IZAWA, Tatehito USUI, Takeshi OHMORI
  • Patent number: 9702695
    Abstract: An object of the present invention is to provide an image processing apparatus that quickly and precisely measures or evaluates a distortion in a field of view and a charged particle beam apparatus. To attain the object, an image processing apparatus or the like is proposed which acquires a first image of a first area of an imaging target and a second image of a second area that is located at a different position than the first area and partially overlaps with the first area and determines the distance between a measurement point in the second image and a second part of the second image that corresponds to a particular area for a plurality of sites in the overlapping area of the first image and the second image.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: July 11, 2017
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hiroki Kawada, Osamu Inoue, Miyako Matsui, Takahiro Kawasaki, Naoshi Itabashi, Takashi Takahama, Katsumi Setoguchi, Osamu Komuro
  • Publication number: 20160079073
    Abstract: A plasma processing method includes: a first step of introducing a gas having reactivity with a film to be processed disposed in advance on a top surface of a wafer into a processing chamber to form an adhesion layer on the film; a second step of expelling a part of the gas remaining in the processing chamber while supply of the gas having reactivity is stopped; a third step of introducing a rare gas into the processing chamber to form a plasma and desorbing reaction products of the adhesion layer and the film to be processed using particles and vacuum ultraviolet light in the plasma; and a fourth step of expelling the reaction products while the plasma is not formed.
    Type: Application
    Filed: February 19, 2015
    Publication date: March 17, 2016
    Inventors: Miyako MATSUI, Kenetsu YOKOGAWA, Tadamitsu KANEKIYO, Tetsuo ONO, Kazunori SHINODA
  • Publication number: 20150293040
    Abstract: There is provided a calculating system that can calculate only a gradation image of only a measurement target in monitoring large-scale facility using a transmission imaging on the basis of a cosmic ray. In addition to a gradation image on the basis of a flight track of the cosmic ray, a gradation image of the density length on the basis of structure information of a structural object which is not a measurement target is made and used to correct the gradation image on the basis of the flight track of the cosmic ray.
    Type: Application
    Filed: December 5, 2012
    Publication date: October 15, 2015
    Inventors: Koji Aramaki, Masanari Koguchi, Miyako Matsui
  • Publication number: 20130146763
    Abstract: An object of the present invention is to provide an image processing apparatus that quickly and precisely measures or evaluates a distortion in a field of view and a charged particle beam apparatus. To attain the object, an image processing apparatus or the like is proposed which acquires a first image of a first area of an imaging target and a second image of a second area that is located at a different position than the first area and partially overlaps with the first area and determines the distance between a measurement point in the second image and a second part of the second image that corresponds to a particular area for a plurality of sites in the overlapping area of the first image and the second image.
    Type: Application
    Filed: May 25, 2011
    Publication date: June 13, 2013
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Hiroki Kawada, Osamu Inoue, Miyako Matsui, Takahiro Kawasaki, Naoshi Itabashi, Takashi Takahama, Katsumi Setoguchi, Osamu Komuro
  • Patent number: 7368713
    Abstract: A method and apparatus for inspecting a wafer during a semiconductor device fabrication process. The apparatus performs, only via observation from the wafer's top surface, inspection and quantitative evaluation of a portion that is in the shadow of an incident electron beam and a buried structure in the wafer. To this end, the electron beam is emitted so that it partially penetrates a wafer surface and reaches an unexposed pattern portion to the beam. When a stereoscopic structure is constructed from the scan image based on a secondarily generated signal, generate a stereoscopic model of a pattern being tested. The secondary signal is used to detect position information of a pattern edge(s) and signal intensity. Then, use the information to calculate more than one feature quantity of the test pattern. From the calculated feature quantities, the stereoscopic structure is constructed for displaying a 3D structure of the pattern.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: May 6, 2008
    Assignee: Hitachi High-Technologies Corporation
    Inventor: Miyako Matsui
  • Publication number: 20060043292
    Abstract: A method and apparatus for inspecting a wafer during a semiconductor device fabrication process. The apparatus performs, only via observation from the wafer's top surface, inspection and quantitative evaluation of a portion that is in the shadow of an incident electron beam and a buried structure in the wafer. To this end, the electron beam is emitted so that it partially penetrates a wafer surface and reaches an unexposed pattern portion to the beam. When a stereoscopic structure is constructed from the scan image based on a secondarily generated signal, generate a stereoscopic model of a pattern being tested. The secondary signal is used to detect position information of a pattern edge(s) and signal intensity. Then, use the information to calculate more than one feature quantity of the test pattern. From the calculated feature quantities, the stereoscopic structure is constructed for displaying a 3D structure of the pattern.
    Type: Application
    Filed: July 27, 2005
    Publication date: March 2, 2006
    Inventor: Miyako Matsui
  • Patent number: 6753524
    Abstract: In a method for inspecting positions and types of defects on wafers with circuit patterns in a semiconductor manufacturing process, inspection is made regardless of the types and materials of junctions of circuit patterns of the semiconductor devices, different kinds of defects being distinguished from one another. Further, electrification of the circuit pattern is prevented, and the area to be exposed to an electron beam is controlled evenly and at a desired voltage. During inspection of the positions and types of defects on a wafer using a charged-particle beam from a charged-particle source, an optical beam from an optical source as well as a charged-particle beam are applied to a junction of the circuit pattern of the wafer placed on a wafer holder. Thus, regardless of the types and materials of circuit patterns, a highly sensitive inspection is made according to contrasts in the defects of a captured image.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: June 22, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Miyako Matsui, Mari Nozoe
  • Patent number: 6700122
    Abstract: The present invention provides a wafer inspection technique capable of detecting a defect in a wafer on which a pattern having a large step such as a contact hole being subjected to a semiconductor manufacturing process is formed and obtaining information such as the position and kind of a defect such as a hole with open contact failure caused in dry etching process at high speed. A wafer on which a pattern having a large step being subjected to a semiconductor manufacturing process is formed is scanned and irradiated with an electron beam having irradiation energy which is in a range from 100 eV to 1,000 eV, and a defect is detected at high speed from an image of secondary electrons generated. Before the secondary electron image is captured, the wafer is irradiated with an electron beam at high speed while being moved to thereby charge the surface of the wafer with a desired charging voltage.
    Type: Grant
    Filed: January 4, 2002
    Date of Patent: March 2, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Miyako Matsui, Mari Nozoe, Atsuko Takafuji
  • Publication number: 20030094572
    Abstract: In a method for inspecting positions and types of defects on wafers with circuit patterns in the semiconductor manufacturing process, a highly sensitive inspection is made regardless of the types and materials of junctions of circuit patterns of the semiconductor devices, different kinds of defects being distinguished from one another. Further, extraordinary electrification of the circuit pattern is prevented and an area to be exposed to an electron beam is controlled evenly and at a desired voltage. Thus, this method contributes to the early setup of manufacturing processes of integrated circuits and early measures against defects, increasing the reliability and productivity of the semiconductor devices.
    Type: Application
    Filed: June 12, 2002
    Publication date: May 22, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Miyako Matsui, Mari Nozoe
  • Publication number: 20020134936
    Abstract: The present invention provides a wafer inspection technique capable of detecting a defect in a wafer on which a pattern having a large step such as a contact hole being subjected to a semiconductor manufacturing process is formed and obtaining information such as the position and kind of a defect such as a hole with open contact failure caused in dry etching process at high speed. A wafer on which a pattern having a large step being subjected to a semiconductor manufacturing process is formed is scanned and irradiated with an electron beam having irradiation energy which is in a range from 100 eV to 1,000 eV, and a defect is detected at high speed from an image of secondary electrons generated. Before the secondary electron image is captured, the wafer is irradiated with an electron beam at high speed while being moved to thereby charge the surface of the wafer with a desired charging voltage.
    Type: Application
    Filed: January 4, 2002
    Publication date: September 26, 2002
    Inventors: Miyako Matsui, Mari Nozoe, Atsuko Takafuji