Patents by Inventor Miyuki Hirosue
Miyuki Hirosue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7408612Abstract: A display device comprises scan lines on a insulating substrate, signal lines intersecting with the scan lines with an insulating film interposed therebetween, a display area comprising pixel electrodes connected to the signal lines, a scan line driver circuit connected to the scan lines, a signal line driver circuit connected to the signal lines. The scan line driver circuit and the signal line driver circuit are mounted directly on the insulating substrate outside of the display area and close to one side of the display area. Lines connecting the scan line driver circuit and the signal line driver circuit are formed in an area in which the scan line driver circuit and the signal line driver circuit are mounted.Type: GrantFiled: July 15, 2005Date of Patent: August 5, 2008Assignee: Mitsubishi Electric CorporationInventors: Miyuki Hirosue, Akio Nakayama
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Patent number: 7002657Abstract: A display device comprises scan lines on a insulating substrate, signal lines intersecting with the scan lines with an insulating film interposed therebetween, a display area comprising pixel electrodes connected to the signal lines, a scan line driver circuit connected to the scan lines, a signal line driver circuit connected to the signal lines. The scan line driver circuit and the signal line driver circuit are mounted directly on the insulating substrate outside of the display area and close to one side of the display area. Lines connecting the scan line driver circuit and the signal line driver circuit are formed in an area in which the scan line driver circuit and the signal line driver circuit are mounted.Type: GrantFiled: April 1, 2003Date of Patent: February 21, 2006Assignee: Advanced Display Inc.Inventors: Miyuki Hirosue, Akio Nakayama
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Publication number: 20050248713Abstract: A display device comprises scan lines on a insulating substrate, signal lines intersecting with the scan lines with an insulating film interposed therebetween, a display area comprising pixel electrodes connected to the signal lines, a scan line driver circuit connected to the scan lines, a signal line driver circuit connected to the signal lines. The scan line driver circuit and the signal line driver circuit are mounted directly on the insulating substrate outside of the display area and close to one side of the display area. Lines connecting the scan line driver circuit and the signal line driver circuit are formed in an area in which the scan line driver circuit and the signal line driver circuit are mounted.Type: ApplicationFiled: July 15, 2005Publication date: November 10, 2005Applicant: ADVANCED DISPLAY INC.Inventors: Miyuki Hirosue, Akio Nakayama
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Publication number: 20050248710Abstract: A display device comprises scan lines on a insulating substrate, signal lines intersecting with the scan lines with an insulating film interposed therebetween, a display area comprising pixel electrodes connected to the signal lines, a scan line driver circuit connected to the scan lines, a signal line driver circuit connected to the signal lines. The scan line driver circuit and the signal line driver circuit are mounted directly on the insulating substrate outside of the display area and close to one side of the display area. Lines connecting the scan line driver circuit and the signal line driver circuit are formed in an area in which the scan line driver circuit and the signal line driver circuit are mounted.Type: ApplicationFiled: July 15, 2005Publication date: November 10, 2005Applicant: ADVANCED DISPLAY INC.Inventors: Miyuki Hirosue, Akio Nakayama
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Patent number: 6717629Abstract: In a process for chamfering substrates constituting a liquid crystal display device, it is made possible to prevent a static electricity from generating in a chamfering amount mark used in order to perform a highly accurate chamfering, and improve a chamfering accuracy. There is provided a structure in which a chamfering amount mark 7 formed in an end portion of a 1st substrate is formed so as to be electrically connected to a short wiring 10, and a connection between the chamfering amount mark 7 and extension wirings 9 which are another conductive wirings is performed, thereby discharging the static electricity to another conductive pattern. Incidentally, there is adopted a structure in which plural mark patterns 8b constituting the chamfering amount mark 7 are intended to be electrically connected by a connecting wiring 8a and, additionally, the connecting wiring 8a is extended to a short wiring 10 side.Type: GrantFiled: October 30, 2002Date of Patent: April 6, 2004Assignee: Kabushiki Kaisha Advanced DisplayInventors: Akinori Sumi, Ichiro Takasaki, Miyuki Hirosue
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Publication number: 20030189686Abstract: A display device comprises scan lines on a insulating substrate, signal lines intersecting with the scan lines with an insulating film interposed therebetween, a display area comprising pixel electrodes connected to the signal lines, a scan line driver circuit connected to the scan lines, a signal line driver circuit connected to the signal lines. The scan line driver circuit and the signal line driver circuit are mounted directly on the insulating substrate outside of the display area and close to one side of the display area. Lines connecting the scan line driver circuit and the signal line driver circuit are formed in an area in which the scan line driver circuit and the signal line driver circuit are mounted.Type: ApplicationFiled: April 1, 2003Publication date: October 9, 2003Applicant: ADVANCED DISPLAY INC.Inventors: Miyuki Hirosue, Akio Nakayama
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Publication number: 20030063250Abstract: In a process for chamfering substrates constituting a liquid crystal display device, it is made possible to prevent a static electricity from generating in a chamfering amount mark used in order to perform a highly accurate chamfering, and improve a chamfering accuracy. There is provided a structure in which a chamfering amount mark 7 formed in an end portion of a 1st substrate is formed so as to be electrically connected to a short wiring 10, and a connection between the chamfering amount mark 7 and extension wirings 9 which are another conductive wirings is performed, thereby discharging the static electricity to another conductive pattern. Incidentally, there is adopted a structure in which plural mark patterns 8b constituting the chamfering amount mark 7 are intended to be electrically connected by a connecting wiring 8a and, additionally, the connecting wiring 8a is extended to a short wiring 10 side.Type: ApplicationFiled: October 30, 2002Publication date: April 3, 2003Applicant: KABUSHIKI KAISHA ADVANCED DISPLAYInventors: Akinori Sumi, Ichiro Takasaki, Miyuki Hirosue
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Patent number: 6504581Abstract: Method for manufacturing a liquid crystal display apparatus including: a TFT array substrate having a plurality of scanning lines formed on a transparent insulating substrate by a metal film, a plurality of data lines formed on or beneath the scanning lines so as to be separated by an insulating film in such a manner as to intersect the scanning lines, switching elements that are formed by a semiconductor layer at respective intersections between the scanning lines and the data lines, and pixel electrodes that are formed by a transparent conductive film and electrically connected to the switching elements; and a counter substrate provided with a liquid crystal interposed between the TFT array substrate and the counter substrate; wherein a divisional exposing method is adopted as a patterning method on the TFT array substrate, so that adjacent exposing areas within a display area of the liquid crystal display apparatus have overlapped portions with each other, and so that a shot layout is defined in such a manType: GrantFiled: May 26, 1999Date of Patent: January 7, 2003Assignee: Advanced Display Inc.Inventors: Miyuki Hirosue, Naoki Nakagawa, Hironori Aoki
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Patent number: 6480256Abstract: In a process for chamfering substrates constituting a liquid crystal display device, it is made possible to prevent a static electricity from generating in a chamfering amount mark used in order to perform a highly accurate chamfering, and improve a chamfering accuracy. There is provided a structure in which a chamfering amount mark 7 formed in an end portion of a 1st substrate is formed so as to be electrically connected to a short wiring 10, and a connection between the chamfering amount mark 7 and extension wirings 9 which are another conductive wirings is performed, thereby discharging the static electricity to another conductive pattern. Incidentally, there is adopted a structure in which plural mark patterns 8b constituting the chamfering amount mark 7 are intended to be electrically connected by a connecting wiring 8a and, additionally, the connecting wiring 8a is extended to a short wiring 10 side.Type: GrantFiled: December 5, 2000Date of Patent: November 12, 2002Assignee: Kabushiki Kaisha Advanced DisplayInventors: Akinori Sumi, Ichiro Takasaki, Miyuki Hirosue
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Publication number: 20010005256Abstract: In a process for chamfering substrates constituting a liquid crystal display device, it is made possible to prevent a static electricity from generating in a chamfering amount mark used in order to perform a highly accurate chamfering, and improve a chamfering accuracy. There is provided a structure in which a chamfering amount mark 7 formed in an end portion of a 1st substrate is formed so as to be electrically connected to a short wiring 10, and a connection between the chamfering amount mark 7 and extension wirings 9 which are another conductive wirings is performed, thereby discharging the static electricity to another conductive pattern. Incidentally, there is adopted a structure in which plural mark patterns 8b constituting the chamfering amount mark 7 are intended to be electrically connected by a connecting wiring 8a and, additionally, the connecting wiring 8a is extended to a short wiring 10 side.Type: ApplicationFiled: December 5, 2000Publication date: June 28, 2001Inventors: Akinori Sumi, Ichiro Takasaki, Miyuki Hirosue
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Patent number: 5394219Abstract: A first window portion is provided in a predetermined portion on a substrate where pellicle films of a photomask are not provided, and a second window portion is provided in a predetermined portion on substrate where pellicle films of the photomask are provided. By comparing amounts of exposure luminous flux transmitting first and second window portions it is possible to determine the life of pellicle films and the life of an exposure light source.Type: GrantFiled: April 30, 1993Date of Patent: February 28, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Miyuki Hirosue