Patents by Inventor Modi Dipakkumar Trikamlal

Modi Dipakkumar Trikamlal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11928027
    Abstract: Embodiments include receiving fixed size error checking and correction data blocks and metadata at a memory controller. Embodiments may include performing data to symbol mapping based upon the fixed size data blocks and providing an output of the data to symbol mapping to a first encoder without metadata configured for full detection correction of single device error and to a second encoder with metadata configured for partial detection correction of single device error. Embodiments may include receiving data at a memory based upon an output from the first encoder and the second encoder and receiving data from the memory at a first decoder without metadata configured for full detection correction of single device error and at a second decoder with metadata configured for partial detection correction. Embodiments may include re-mapping symbol data from the first decoder and the second decoder to actual data and generating output data blocks and metadata.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 12, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Modi Dipakkumar Trikamlal, Maddula Balakrishna Chaitanya