Abstract: In certain examples, methods and semiconductor structures are directed to an integrated circuit (IC) having a diamond layer section and a GaN-based substrate being monolithically integrated or bonded as part of the same IC. In a specific example, the GaN-based substrate includes GaN, AlxGayN (0<x<1; x+y=1) and a dielectric layer, and a diamond layer section which may include polycrystalline diamond. The IC includes: a GaN-based field effect transistor (FET) integrated with a portion of the GaN-based substrate, and a diamond-based FET integrated with a portion of the diamond layer section, the diamond FET being electrically coupled to the GaN-based FET and situated over or against a surface region of the GaN-based substrate.

Abstract: In certain examples, methods and semiconductor structures are directed to a method comprising steps of forming by monolithically integrating or seeding via polycrystalline diamond (PCD) particles on a GaN-based layer characterized as including GaN in at least a surface region of the GaN-based layer. After the step of seeding, the PCD particles are grown under a selected pressure to form a diamond layer section and to provide a semi-conductive structure that includes the diamond layer section integrated on or against the surface region of the GaN-based layer.

Abstract: In certain examples, methods and semiconductor structures are directed to an integrated circuit (IC) having a diamond layer section and a GaN-based substrate being monolithically integrated or bonded as part of the same IC. In a specific example, the GaN-based substrate includes GaN, AlxGayN (0<x<1; x+y=1) and a dielectric layer, and a diamond layer section which may include polycrystalline diamond. The IC includes: a GaN-based field effect transistor (FET) integrated with a portion of the GaN-based substrate, and a diamond-based FET integrated with a portion of the diamond layer section, the diamond FET being electrically coupled to the GaN-based FET and situated over or against a surface region of the GaN-based substrate.

Abstract: The disclosed embodiments relate to the design of a new type of transistor called a “field-effect bipolar transistor” (FEBT). This FEBT includes a substrate, which comprises a body of the FEBT. It also includes a source comprising an N+ doped region of the substrate, and a drain comprising a P+ doped region of the substrate. The FEBT also includes one or more gates composed of a dielectric material, and a low-doped or undoped semiconductor channel sandwiched between the one or more gates and the substrate, wherein the low-doped or undoped semiconductor channel is bounded by the source and the drain.