Patents by Inventor Mohamed Boufnichel
Mohamed Boufnichel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128311Abstract: The present disclosure relates to a capacitor including a first conductive layer over which is formed a stack, comprising from the upper face of the first layer, a first electrode, a first dielectric layer, a second electrode, and a second conductive layer, the stack comprising a stair step within the second conductive layer, the second electrode, and a part of the thickness of the first dielectric layer, the stair step being filled with a second dielectric layer so that the sidewalls of the first electrode are aligned with respect to the sidewalls of the second dielectric layer.Type: ApplicationFiled: July 24, 2023Publication date: April 18, 2024Applicant: STMICROELECTRONICS (TOURS) SASInventor: Mohamed BOUFNICHEL
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Patent number: 11955480Abstract: The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.Type: GrantFiled: May 11, 2022Date of Patent: April 9, 2024Assignee: STMICROELECTRONICS (TOURS) SASInventor: Mohamed Boufnichel
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Patent number: 11881358Abstract: A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.Type: GrantFiled: June 13, 2022Date of Patent: January 23, 2024Assignee: STMicroelectronics (Tours) SASInventor: Mohamed Boufnichel
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Publication number: 20230215733Abstract: The present description concerns a method of forming a cavity in a substrate comprising: the forming of an etch mask comprising, opposite the location of the cavity, a plurality of sets of openings, the ratio between the openings and the mask of each set being selected according to the desired profile of the cavity opposite the surface of the mask having the set inscribed therein; and the wet etching of the substrate through the openings.Type: ApplicationFiled: December 29, 2022Publication date: July 6, 2023Applicant: STMICROELECTRONICS (TOURS) SASInventor: Mohamed BOUFNICHEL
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Publication number: 20220310326Abstract: A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.Type: ApplicationFiled: June 13, 2022Publication date: September 29, 2022Applicant: STMICROELECTRONICS (TOURS) SASInventor: Mohamed BOUFNICHEL
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Publication number: 20220311078Abstract: The disclosure relates to microbattery devices and assemblies. In an embodiment, a device includes a plurality of microbatteries, a first flexible encapsulation film, and a second flexible encapsulation film. Each of the microbatteries includes a first contact terminal and a second contact terminal spaced apart from one another. The first flexible encapsulation film includes a first conductive layer electrically coupled to the first contact terminal of each of the microbatteries, and a first insulating layer on the first conductive layer. The second flexible encapsulation film includes a second conductive layer electrically coupled to the second contact terminal of each of the microbatteries, and a second insulating layer on the second conductive layer.Type: ApplicationFiled: June 13, 2022Publication date: September 29, 2022Applicant: STMICROELECTRONICS (TOURS) SASInventor: Mohamed BOUFNICHEL
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Publication number: 20220271030Abstract: The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.Type: ApplicationFiled: May 11, 2022Publication date: August 25, 2022Applicant: STMICROELECTRONICS (TOURS) SASInventor: Mohamed BOUFNICHEL
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Patent number: 11387517Abstract: The disclosure relates to microbattery devices and assemblies. In an embodiment, a device includes a plurality of microbatteries, a first flexible encapsulation film, and a second flexible encapsulation film. Each of the microbatteries includes a first contact terminal and a second contact terminal spaced apart from one another. The first flexible encapsulation film includes a first conductive layer electrically coupled to the first contact terminal of each of the microbatteries, and a first insulating layer on the first conductive layer. The second flexible encapsulation film includes a second conductive layer electrically coupled to the second contact terminal of each of the microbatteries, and a second insulating layer on the second conductive layer.Type: GrantFiled: January 23, 2019Date of Patent: July 12, 2022Assignee: STMicroelectronics (Tours) SASInventor: Mohamed Boufnichel
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Patent number: 11380486Abstract: A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.Type: GrantFiled: September 16, 2019Date of Patent: July 5, 2022Assignee: STMicroelectronics (Tours) SASInventor: Mohamed Boufnichel
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Patent number: 11373994Abstract: Methods and devices for protecting against electrical discharges are provided. One such device for protecting against electrical discharges includes a semiconductor substrate and an isolation trench in the semiconductor substrate. The isolation trench includes an enclosed space that contains a gas.Type: GrantFiled: September 22, 2020Date of Patent: June 28, 2022Assignee: STMicroelectronics (Tours) SASInventor: Mohamed Boufnichel
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Publication number: 20220190103Abstract: The present description concerns a capacitor manufacturing method, including the successive steps of: a) forming a stack including, in the order from the upper surface of a substrate, a first conductive layer made of aluminum or an aluminum-based alloy, a first electrode, a first dielectric layer, and a second electrode; b) etching, by chemical plasma etching, an upper portion of the stack, said chemical plasma etching being interrupted before the upper surface of the first conductive layer; and c) etching, by physical plasma etching, a lower portion of the stack, said physical plasma etching being interrupted on the upper surface of the first conductive layer.Type: ApplicationFiled: December 3, 2021Publication date: June 16, 2022Applicant: STMICROELECTRONICS (TOURS) SASInventor: Mohamed BOUFNICHEL
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Patent number: 11335678Abstract: The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.Type: GrantFiled: February 25, 2020Date of Patent: May 17, 2022Assignee: STMICROELECTRONICS (TOURS) SASInventor: Mohamed Boufnichel
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Patent number: 11056744Abstract: A battery structure has structure anode and cathode contacts on a front face and on a rear face. The battery structure includes a battery having battery anode and cathode contacts only on a front face thereof. A film including a conductive layer and an insulating layer jackets the battery. The conductive layer extends over the battery anode and cathode contacts and is interrupted therebetween. Openings are provided in the insulating layer on the front and rear faces of the battery structure to form the structure anode and cathode contacts of the battery structure.Type: GrantFiled: November 22, 2019Date of Patent: July 6, 2021Assignee: STMicroelectronics (Tours) SASInventors: Julien Ladroue, Mohamed Boufnichel
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Publication number: 20210098444Abstract: Methods and devices for protecting against electrical discharges are provided. One such device for protecting against electrical discharges includes a semiconductor substrate and an isolation trench in the semiconductor substrate. The isolation trench includes an enclosed space that contains a gas.Type: ApplicationFiled: September 22, 2020Publication date: April 1, 2021Inventor: Mohamed BOUFNICHEL
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Patent number: 10903525Abstract: A self-supporting thin-film battery is manufacture by forming on the upper surface of a support substrate a vertical active stack having as a lower layer a metal layer having formed therein a first contact terminal of a first polarity of the battery and having formed therein as an upper layer a metal layer having a second contact terminal of a second polarity of the battery. A support film is then bonded to an upper surface of the upper layer. The lower layer is the separated from the substrate by projecting a laser beam through the substrate from a lower surface thereof to impinge on the lower layer.Type: GrantFiled: August 2, 2018Date of Patent: January 26, 2021Assignee: STMicroelectronics (Tours) SASInventors: Julien Ladroue, Mohamed Boufnichel
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Patent number: 10797290Abstract: Identical planar electronic components are stacked in an assembly. Each component has two contact metallizations positioned on edges of a same surface of the component. The components are stacked along a common axis. Each successive component is rotated about the common axis by a fixed angle. A value of the fixed angle is selected to position, side by side, the contact metallization of one component and the contact metallization of another next component adjacent to each other in the stack. Electrical connections are provided between two adjacent contact metallizations.Type: GrantFiled: February 23, 2017Date of Patent: October 6, 2020Assignee: STMicroelectronics (Tours) SASInventors: Mohamed Boufnichel, Julien Ladroue
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Publication number: 20200286886Abstract: The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.Type: ApplicationFiled: February 25, 2020Publication date: September 10, 2020Inventor: Mohamed BOUFNICHEL
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Patent number: 10643856Abstract: Laterally insulated integrated circuit chips are fabricated from a semiconductor wafer. Peripheral trenches are formed in the wafer which laterally delimit integrated circuit chips to be formed. A depth of the peripheral trenches is greater than or equal to a desired final thickness of the integrated circuit chips. The peripheral trenches are formed by a process which repeats successive steps of a) ion etching using a sulfur hexafluoride plasma, and b) passivating using an octafluorocyclobutane plasma. Upon completion of the step of forming the peripheral trenches, lateral walls of the peripheral trenches are covered by an insulating layer of a polyfluoroethene. A thinning step is performed on the lower surface of the wafer until a bottom of the peripheral trenches is reached. The insulating layer is not removed.Type: GrantFiled: July 12, 2018Date of Patent: May 5, 2020Assignee: STMicroelectronics (Tours) SASInventors: Mathieu Rouviere, Mohamed Boufnichel, Eric Laconde
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Publication number: 20200098524Abstract: A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.Type: ApplicationFiled: September 16, 2019Publication date: March 26, 2020Inventor: Mohamed Boufnichel
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Publication number: 20200091470Abstract: A battery structure has structure anode and cathode contacts on a front face and on a rear face. The battery structure includes a battery having battery anode and cathode contacts only on a front face thereof. A film including a conductive layer and an insulating layer jackets the battery. The conductive layer extends over the battery anode and cathode contacts and is interrupted therebetween. Openings are provided in the insulating layer on the front and rear faces of the battery structure to form the structure anode and cathode contacts of the battery structure.Type: ApplicationFiled: November 22, 2019Publication date: March 19, 2020Applicant: STMicroelectronics (Tours) SASInventors: Julien LADROUE, Mohamed BOUFNICHEL