Patents by Inventor Mohammed Reza Hakami

Mohammed Reza Hakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8539199
    Abstract: Described embodiments provide a hash processor for a system having multiple processing modules and a shared memory. The hash processor includes a descriptor table with N entries, each entry corresponding to a hash table of the hash processor. A direct mapped table in the shared memory includes at least one memory block including N hash buckets. The direct mapped table includes a predetermined number of hash buckets for each hash table. Each hash bucket includes one or more hash key and value pairs, and a link value. Memory blocks in the shared memory include dynamic hash buckets available for allocation to a hash table. A dynamic hash bucket is allocated to a hash table when the hash buckets in the direct mapped table are filled beyond a threshold. The link value in the hash bucket is set to the address of the dynamic hash bucket allocated to the hash table.
    Type: Grant
    Filed: March 12, 2011
    Date of Patent: September 17, 2013
    Assignee: LSI Corporation
    Inventors: William Burroughs, Deepak Mital, Mohammed Reza Hakami, Michael R. Betker
  • Patent number: 8515965
    Abstract: Described embodiments process hash operation requests of a network processor. A hash processor determines a job identifier, a corresponding hash table, and a setting of a traversal indicator for a received hash operation request that includes a desired key. The hash processor concurrently generates a read request for a first bucket of the hash table, and provides the job identifier, the key and the traversal indicator to a read return processor. The read return processor stores the key and traversal indicator in a job memory and stores, in a return memory, entries of the first bucket of the hash table. If a stored entry matches the desired key, the read return processor determines, based on the traversal indicator, whether to read a next bucket of the hash table and provides the job identifier, the matching key, and the address of the bucket containing the matching key to the hash processor.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: August 20, 2013
    Assignee: LSI Corporation
    Inventors: Deepak Mital, Mohammed Reza Hakami, William Burroughs
  • Patent number: 8321385
    Abstract: Described embodiments provide coherent processing of hash operations of a network processor having a plurality of processing modules. A hash processor of the network processor receives hash operation requests from the plurality of processing modules. A hash table identifier and bucket index corresponding to the received hash operation request are determined. An active index list is maintained for active hash operations for each hash table identifier and bucket index. If the hash table identifier and bucket index of the received hash operation request are in the active index list, the received hash operation request is deferred until the hash table identifier and bucket index corresponding to the received hash operation request clear from the active index list. Otherwise, the active index list is updated with the hash table identifier and bucket index of the received hash operation request and the received hash operation request is processed.
    Type: Grant
    Filed: March 12, 2011
    Date of Patent: November 27, 2012
    Assignee: LSI Corporation
    Inventors: William Burroughs, Deepak Mital, Mohammed Reza Hakami
  • Publication number: 20120158729
    Abstract: Described embodiments process hash operation requests of a network processor. A hash processor determines a job identifier, a corresponding hash table, and a setting of a traversal indicator for a received hash operation request that includes a desired key. The hash processor concurrently generates a read request for a first bucket of the hash table, and provides the job identifier, the key and the traversal indicator to a read return processor. The read return processor stores the key and traversal indicator in a job memory and stores, in a return memory, entries of the first bucket of the hash table. If a stored entry matches the desired key, the read return processor determines, based on the traversal indicator, whether to read a next bucket of the hash table and provides the job identifier, the matching key, and the address of the bucket containing the matching key to the hash processor.
    Type: Application
    Filed: February 23, 2012
    Publication date: June 21, 2012
    Inventors: Deepak Mital, Mohammed Reza Hakami, William Burroughs
  • Publication number: 20110225168
    Abstract: Described embodiments provide coherent processing of hash operations of a network processor having a plurality of processing modules. A hash processor of the network processor receives hash operation requests from the plurality of processing modules. A hash table identifier and bucket index corresponding to the received hash operation request are determined. An active index list is maintained for active hash operations for each hash table identifier and bucket index. If the hash table identifier and bucket index of the received hash operation request are in the active index list, the received hash operation request is deferred until the hash table identifier and bucket index corresponding to the received hash operation request clear from the active index list. Otherwise, the active index list is updated with the hash table identifier and bucket index of the received hash operation request and the received hash operation request is processed.
    Type: Application
    Filed: March 12, 2011
    Publication date: September 15, 2011
    Applicant: LSI CORPORATION
    Inventors: William Burroughs, Deepak Mital, Mohammed Reza Hakami
  • Publication number: 20110225391
    Abstract: Described embodiments provide a hash processor for a system having multiple processing modules and a shared memory. The hash processor includes a descriptor table with N entries, each entry corresponding to a hash table of the hash processor. A direct mapped table in the shared memory includes at least one memory block including N hash buckets. The direct mapped table includes a predetermined number of hash buckets for each hash table. Each hash bucket includes one or more hash key and value pairs, and a link value. Memory blocks in the shared memory include dynamic hash buckets available for allocation to a hash table. A dynamic hash bucket is allocated to a hash table when the hash buckets in the direct mapped table are filled beyond a threshold. The link value in the hash bucket is set to the address of the dynamic hash bucket allocated to the hash table.
    Type: Application
    Filed: March 12, 2011
    Publication date: September 15, 2011
    Applicant: LSI CORPORATION
    Inventors: William Burroughs, Deepak Mital, Mohammed Reza Hakami, Michael R. Betker