Abstract: Consistent with a further aspect of the present disclosure, previously encoded data is stored in a memory, and an encoder accesses both input data and previously encoded data to generate new encoded data or a new codeword. Each codeword is stored in a row of the memory, and with each newly generated codeword, each previously stored code word is shifted to an adjacent row of the memory. In one example, the memory is delineated as a plurality of blocks including rows and columns of bits. When generating a new code word, randomly selected columns of bits in the memory are read from randomly selected blocks of the memory and supplied to the encoder. In this manner the number of times the memory is access is reduced and power consumption is reduced.

Abstract: Consistent with the present disclosure independent phase and frequency clock recovery on each SC. Both leaf and hub perform digital clock recovery on each SC by increasing the Rx-ADC sampling rate by a few ppm (˜16 ppm), and using a delay compensating element, together with gapped clocks. The gaps and delay compensating elements are independent on each SC. The delay element is performed using the frequency domain DSP engine, where the frequency domain equalizer coefficients are modified with a delay compensating element Thus, each SC can have its own fine timing frequency and timing phase tuning, and fine tracking of its own jitter. When the delay compensating element, which, for example, may include a finite impulse response (FIR) filter, reaches the end of its range, a clock gap equal to an integer number of symbols is performed. The delay element can be reset by the same number of symbols providing continuous phase interpolation.

Abstract: Consistent with a further aspect of the present disclosure, previously encoded data is stored in a memory, and an encoder accesses both input data and previously encoded data to generate new encoded data or a new codeword. Each codeword is stored in a row of the memory, and with each newly generated codeword, each previously stored code word is shifted to an adjacent row of the memory. In one example, the memory is delineated as a plurality of blocks including rows and columns of bits. When generating a new code word, randomly selected columns of bits in the memory are read from randomly selected blocks of the memory and supplied to the encoder. In this manner the number of times the memory is access is reduced and power consumption is reduced.