Patents by Inventor Mois P. Navon

Mois P. Navon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8300058
    Abstract: An electronic device including an array of addressable registers storing data. An input register connected to the array stores an input command parameter (e.g an opcode of a command) and its associated operands in one or more input registers connected to the addressable register array. A single instance of a command accesses the at least one register of the array. Based on the input command parameter, the command for all of the address operands: reads a datum of the data previously stored in at least one register, updates the datum thereby producing an updated datum, and writes the updated datum into at least one register. The command has multiple address operands referencing the one or more registers and supports two or more of the address operands being identical. The device includes logic circuitry which provides a logical output signal to the processing circuitry indicating which, if any, of the address operands are identical.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: October 30, 2012
    Inventors: Mois P. Navon, Yossi Kreinin, Emmanuel Sixou, Roman Sajman
  • Publication number: 20090228737
    Abstract: An electronic device including an array of addressable registers storing data. An input register connected to the array stores an input command parameter (e.g an opcode of a command) and its associated operands in one or more input registers connected to the addressable register array. A single instance of a command accesses the at least one register of the array. Based on the input command parameter, the command for all of the address operands: reads a datum of the data previously stored in at least one register, updates the datum thereby producing an updated datum, and writes the updated datum into at least one register. The command has multiple address operands referencing the one or more registers and supports two or more of the address operands being identical. The device includes logic circuitry which provides a logical output signal to the processing circuitry indicating which, if any, of the address operands are identical.
    Type: Application
    Filed: March 10, 2008
    Publication date: September 10, 2009
    Applicant: Mobileye Technologies Ltd.
    Inventors: MOIS P. NAVON, Yossi Kreinin, Emmanuel Sixou, Roman Sajman