Abstract: A method is provided for fabricating a CMOS based micro-electromechanical system (MEMS) integrated circuit. A CMOS circuit layout is fabricated on a silicon substrate. A first thick film photo resist layer is then deposited on the CMOS circuit layout. To prevent oxidation from occurring between aluminum and gold, a seed layer is applied to the first thick film photo resist layer. A mold is then formed by selectively depositing a second thick film photo resist layer on portions of the seed layer so that a conductive layer can be applied to the mold. Portions of the seed layer are then removed and a stress compensation material is applied to the conductive layer. A back side surface of the silicon substrate is then etched to remove areas not covered by a mask, and the first thick film photo resist layer is removed via openings in the CMOS circuit layout.