Abstract: Embodiments of an amplifiers and integrated circuits include a first transistor and a second transistor. A second current-carrying terminal of the first transistor may be coupled to a first current-carrying terminal of the second transistor and the control terminal of the second transistor may be coupled to a low impedance alternating current (AC) potential node. A bias network that includes a first circuit element and a second circuit element couples the second current-carrying terminal of the second transistor to the control terminal of the second transistor. The first circuit element may be configured to apply a portion of a potential at the second current-carrying terminal of the second transistor to the control terminal of the second transistor, and the second circuit element may be coupled between the control terminal of the second transistor and a fixed potential.

Abstract: Embodiments of an amplifiers and integrated circuits include a first transistor and a second transistor. A second current-carrying terminal of the first transistor may be coupled to a first current-carrying terminal of the second transistor and the control terminal of the second transistor may be coupled to a low impedance alternating current (AC) potential node. A bias network that includes a first circuit element and a second circuit element couples the second current-carrying terminal of the second transistor to the control terminal of the second transistor. The first circuit element may be configured to apply a portion of a potential at the second current-carrying terminal of the second transistor to the control terminal of the second transistor, and the second circuit element may be coupled between the control terminal of the second transistor and a fixed potential.

Abstract: In one embodiment, a semiconductor device (500) includes a buffer layer (504) formed over a substrate (502). An AlxGa1-xAs layer (506) is formed over the buffer layer (504) and has a first doped region (508) formed therein. An InxGa1-xAs channel layer (512) is formed over the AlxGa1-xAs layer (506). An AlxGa1-xAs layer (518) is formed over the InxGa1-xAs channel layer (512), and the AlxGa1-xAs layer (518) has a second doped region formed therein. A GaAs layer (520) having a first recess is formed over the AlxGa1-xAs layer (518). A control electrode (526) is formed over the AlxGa1-xAs layer (518). A doped GaAs layer (524) is formed over the undoped GaAs layer (520) and on opposite sides of the control electrode (526) and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device (500) maintains linear operation over a wide temperature range.

Abstract: A planar conductor has a first port and a plurality of second ports. A conductive planar region is electrically coupled between the first port and the plurality of second ports. The planar region includes a first region adjacent to the first port, a third region adjacent to the second ports, and a second region between the first region and the third region. Each region has a corresponding greatest width. The greatest width of the second region is less than each of the greatest widths of the first and third regions. Irregular lateral edges of the planar conductor conduct prevent concentrations of an electrical signal at the lateral edges to more uniformly drive devices that are connected to the planar conductor.

Abstract: A thin GaAs Substrate can be provided with a copper back-metal layer to allow the GaAs Substrate to be packaged using conventional plastic packaging technologies. By providing the GaAs Substrate with a copper back-metal layer, the GaAs Substrate can be made thinner than 2 mils (about 50 microns), thereby reducing heat dissipation problems and allowing the semiconductor die to be compatible with soft-solder technologies. By enabling the semiconductor die to be packaged in a plastic package substantial cost savings can be achieved.

Abstract: In one embodiment, a semiconductor device (500) includes a buffer layer (504) formed over a substrate (502). An AlxGa1-xAs layer (506) is formed over the buffer layer (504) and has a first doped region (508) formed therein. An InxGa1-xAs channel layer (512) is formed over the AlxGa1-xAs layer (506). An InxGa1-xP barrier layer (518) is formed over the InxGa1-xAs channel layer (512), the InxGa1-xP layer (518) has a second doped region formed therein. A control electrode (526) is formed over the InxGa1-xP layer (518). An undoped GaAs layer (520) is formed over the InxGa1-xP layer (518) adjacent to the control electrode (526). A doped GaAs layer (524) is formed over the undoped GaAs layer (520) and on opposite sides of the control electrode (526) and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device (500) maintains linear operation over a wide temperature range.