Abstract: A method and an apparatus for processing a screen by using a device are provided. The method includes obtaining, at the second device, a display screen displayed on the first device and information related to the display screen according to a screen display request regarding the first device, determining, at the second device, an additional screen based on the display screen on the first device and the information related to the display screen, and displaying the additional screen near the display screen on the first device.

Abstract: A memory device may comprise: a memory cell array in which memory cells are connected in matrix form to word lines and bit lines; a plurality of mergers connected in series to transfer data that is read from a selected memory cell among the memory cells included in the memory cell array and is transformed into one of a direct current form or a pulse form; and an aligner that synchronizes an edge of first output data, output by one of the plurality of mergers, with an edge of a control pulse, thereby delaying the edge of the first output data.

Abstract: A fuse latch of a semiconductor device including PMOS transistors and NMOS transistors includes a data transmission circuit configured to transmit data to a first node and a second node in response to a first control signal, a latch circuit configured to latch the data received from the data transmission circuit through the first node and the second node, and a data output circuit configured to output the data latched by the latch circuit in response to a second control signal. NMOS transistors contained in the data transmission circuit, the latch circuit, and the data output circuit may be formed in first, fourth, and fifth active regions, PMOS transistors are formed in second and third active regions, and the first to fifth active regions are sequentially arranged in a first direction.

Abstract: Transmit and/or receive beamforming may be applied to the control channel transmission/reception, e.g., in mmW access link system design. Techniques to identify candidate control channel beams and/or their location in the subframe structure may provide for efficient WTRU operation. A framework for beam formed control channel design may support varying capabilities of mBs and/or WTRUs, and/or may support time and/or spatial domain multiplexing of control channel beams. For a multi-beam system, modifications to reference signal design may discover, identify, measure, and/or decode a control channel beam. Techniques may mitigate inter-beam interference. WTRU monitoring may consider beam search space, perhaps in addition to time and/or frequency search space. Enhancements to downlink control channel may support scheduling narrow data beams. Scheduling techniques may achieve high resource utilization, e.g., perhaps when large bandwidths are available and/or WTRUs may be spatially distributed.

Abstract: A rehabilitation exercise device is provided for upper and lower limbs. The rehabilitation exercise device includes: a first support supporting a user's hand or foot; a second support supporting a user's forearm or calf; a pair of first hinges rotatably connecting the first support and the second support to each other; a third support supporting a user's upper arm or thigh; a pair of second hinges rotatably connecting the second support and the third support to each other; and a drive module selectively mounted on any one of the pair of first hinges and the pair of second hinges, and configured to pivot the first support or the second support.

Abstract: A memory system includes: an address scrambler suitable for scrambling an address based on a scrambling rule to generate a scrambled address; a memory core including a plurality of memory cells and suitable for storing data in memory cells designated by the scrambled address; and a scramble control circuit suitable for changing the scrambling rule in response to satisfaction of an attack condition.

Abstract: An adhesive composition according to an embodiment includes an acrylic copolymer, and a compound containing a sulfide group and having a refractive index of 1.57 or more. The adhesive sheet prepared from the adhesive composition may have a low glass transition temperature and high refractive index, such that an image display device may not include a separate high refractive index pattern layer.

Abstract: The present disclosure provides autotaxin (ATX) inhibitor compounds and compositions including said compounds. The present disclosure also provides methods of using said compounds and compositions for inhibiting ATX. Also provided are methods of preparing said compounds and compositions, and synthetic precursors of said compounds.

Abstract: Provided is a composition comprising sonosensitive liposomes for penetrating the blood-brain barrier, wherein the sonosensitive liposomes have excellent drug loading efficiency and ultrasound-induced drug release effect and can effectively penetrating the blood-brain barrier during ultrasound stimulation, and the sonosensitive liposomes can circulate in the body for a long time, and thus have better blood-brain barrier penetration efficiency, a high affinity for brain tumor cells, and excellent delivery effect to tumor sites and can be used as a drug delivery system for delivering brain disease therapeutic agents and the like to the brain.

Abstract: A WTRU may include a memory and a processor. The processor may be configured to receive beam grouping information from a gNB or transmission and reception point (TRP). The beam grouping information may indicate a group of beams that the WTRU may report using group-based reporting. The group-based reporting may be a reduced level of reporting compared to a beam-based reporting. The group-based report may include measurement information for a representative beam. The representative beam may be one of the beams in the group or represents an average of the beams in the group. Alternatively, the representative beam may be a beam that has a maximum measurement value compared to other beams in the group. The group-based report may include a reference signal received power (RSRP) for the representative beam and a differential RSRP for each additional beamin the beam group.

Abstract: A semiconductor memory device comprises: first storage logic configured to store, as first addresses, ‘K’ addresses having different values among input addresses applied during the enable period of a reference signal, second storage logic configured to store, as second addresses, ‘L’ addresses corresponding to a time point at which the enable period of the reference signal is ended among the input addresses, an order controller configured to determine a first output order of each of the first addresses based on a number of times each of the first addresses is repeatedly input, and to determine a second output order for outputting mixed addresses obtained by mixing the first addresses based on the first output order and the second addresses together, and refresh operation logic configured to apply the mixed addresses according to the second output order, to a target refresh operation.

Abstract: A method for manufacturing an eco-friendly capsule includes: disposing a water phase material containing chitosan at a first site, and disposing an oil phase material at a second site and a third site, on a microfluidic chip; moving the water phase material and the oil phase material to a reaction site according to a predetermined flow ratio to produce an emulsion containing droplets having a predetermined diameter; mixing the emulsion with a water phase solution in a mixing tank; and producing chitosan beads by the reaction of the emulsion with the water phase solution.

Abstract: Systems and methods for executing a package simulation for secondary battery production by one or mom processor to perform operations. The operations include executing an apparatus operating unit comprising a 3D package apparatus related to secondary battery production, checking quality of a material produced by the 3D package apparatus, executing a facility operating unit comprising a plurality of adjustment parameters for determining an operation of the 3D package apparatus, obtaining at least one of first user action information obtained through the apparatus operating unit or first user condition information obtained through the facility operating unit, determining at least one of a material checking, the operation of the 3D package apparatus, or a self-inspection based on at least one of the first user action information or the first user condition information, and executing the operation of the 3D package apparatus.

Abstract: A simulation apparatus and a simulation method of Double Side Folding and End of Line (DSF&EOL) for secondary battery production are provided.

Abstract: Disclosed is a method for providing real-time bus information by a terminal, the method including: receiving ultra-precise bus information about buses scheduled to arrive at a bus stop from a server; and based on the ultra-precise bus information, displaying at least one bus which moves toward the bus stop and disappears after passing the bus stop on a map area.

Abstract: A memory device includes a memory cell region including a plurality of rows; a row-hammer control circuit including first and second queues, and configured to: read counting data from a row indicated by a row address according to an active command, store the row address in the first queue according to a comparison result of the counting data and a first set value, store the row address in the second queue according to a comparison result of the counting data and a second set value, and select, as a row-hammer address according to a refresh management command or a target refresh command, one of the row addresses stored in the first queue and the second queue; and a row control circuit configured to refresh one or more rows corresponding to the row-hammer address according to the refresh management command or the target refresh command.

Abstract: A memory device according to the present invention may comprise: a memory cell array in which memory cells of a latch structure are connected in matrix form to word lines and bit line pairs composed of bit lines and inverted bit lines; and a driving circuit which, during an ON period in which the word lines activate first memory cells connected to the corresponding word lines, continuously programs or reads n (n is a natural number of 2 or more) second memory cells among the first memory cells through n first bit line pairs.

Abstract: A wireless transmit/receive unit (WTRU) may receive, from a base station, a synchronization signal/physical broadcast channel (SS/PBCH) block transmission. The WTRU may transmit using a physical random access channel (PRACH) resource. Further, the PRACH resource may be determined based on an SS/PBCH block index. Also, the SS/PBCH block index may be determined based on information associated with the SS/PBCH block transmission. In a further example, the information associated with the PBCH block may be derived from a demodulation reference signal (DMRS) sequence. In another example, the DMRS sequence may be a PBCH DMRS sequence. Also, the information associated with the PBCH block may be derived from PBCH payload bits. Further, the SS/PBCH block index may be associated with a beam. In addition, SS/PBCH transmissions of different beams may be transmitted at different times. Further, the PRACH resource may include a preamble resource, a time resource and a frequency resource.

Abstract: An electroluminescent device including a first electrode and a second electrode facing each other; a light emitting layer disposed between the first electrode and the second electrode; and an electron transport layer disposed between the light emitting layer and the second electrode. The light emitting layer includes a plurality of semiconductor nanoparticles, and the electron transport layer includes a plurality of zinc oxide nanoparticles, the zinc oxide nanoparticles further include magnesium and gallium.

Abstract: A fuse latch of a semiconductor device including PMOS transistors and NMOS transistors includes a data transmission circuit configured to transmit data to a first node and a second node in response to a first control signal, a latch circuit configured to latch the data received from the data transmission circuit through the first node and the second node, and a data output circuit configured to output the data latched by the latch circuit in response to a second control signal. NMOS transistors contained in the data transmission circuit, the latch circuit, and the data output circuit may be formed in first, fourth, and fifth active regions, PMOS transistors are formed in second and third active regions, and the first to fifth active regions are sequentially arranged in a first direction.