Abstract: An Extreme UltraViolet (EUV) mask includes: a reflective layer over a substrate; a capping layer including a porous hydrogen trapping layer over the reflective layer; and an absorption layer over the capping layer.

Abstract: An embodiment of the disclosure provides AgInGaS quantum dots, a method for preparing the same, and an electronic device capable of controlling the emission wavelength according to the composition of Ag, In, and Ga precursors constituting a quantum dot core.

Abstract: An electroporation system including one or more of a pipette, a pipette tip, a pipette docking assembly, and a pulse generator. The pipette docking assembly includes a pipette station, a pipette station guard, and a reservoir (e.g., a buffer tube). A method for transfecting a cell with a payload including providing an electroporation system, providing the cell, providing the payload, introducing the cell and the payload into a pipette tip, and electroporating the cell within the pipette tip by operating the electroporation system.

Abstract: An intra prediction method and a device using the intra prediction method are provided. The intra prediction method includes the steps of: deriving a current prediction mode as a prediction mode of a current block; constructing neighboring samples of the current block with available reference samples; filtering the available reference samples; and generating predicted samples of the current block on the basis of the filtered available reference samples. The filtering step includes performing the filtering using the available reference sample located in the prediction direction of the current prediction mode and a predetermined number of available reference samples neighboring to the prediction direction of the current prediction mode.

Abstract: A semiconductor package includes a semiconductor chip including a first area and a second area around the first area, and a substrate including a second surface, the second surface facing a first surface of the semiconductor chip, a first trench defined on the second surface, and the first trench at least partially overlapping the second area of the semiconductor chip. The semiconductor package includes a bump structure including first bumps on the first area of the semiconductor chip, and second bumps on the second area of the semiconductor chip, the bump structure between the substrate and the semiconductor chip, and a first passive device in the first trench. The second bumps are in contact with the first surface of the semiconductor chip and the first passive device.

Abstract: An Extreme UltraViolet (EUV) mask includes: a reflective layer over a substrate; a capping layer including a porous hydrogen trapping layer over the reflective layer; and an absorption layer over the capping layer.

Abstract: An image processing apparatus for minimizing a collective amount of power consumed by a plurality of display apparatuses of a multi-screen system to display an image of the multi-screen system, and for optimizing hue and luminance of the image of the multi-screen system.

Abstract: A display apparatus is provided. The display apparatus includes: a display; a storage configured to store output luminance information of a plurality of grayscale values according to brightness information; and a processor configured to: obtain a plurality of grayscale adjustment curves based on the output luminance information stored in the storage, obtain a plurality of calibration effects by applying each of the plurality of grayscale adjustment curves to an input image, obtain a grayscale adjustment curve corresponding to a maximum calibration effect from among the plurality of calibration effects, adjust a grayscale of each pixel of the input image based on the obtained grayscale adjustment curve to generate an output image, and output the output image through the display.

Abstract: An image processing apparatus for minimizing a collective amount of power consumed by a plurality of display apparatuses of a multi-screen system to display an image of the multi-screen system, and for optimizing hue and luminance of the image of the multi-screen system.

Abstract: A display apparatus is provided. The display apparatus includes: a display; a storage configured to store output luminance information of a plurality of grayscale values according to brightness information; and a processor configured to: obtain a plurality of grayscale adjustment curves based on the output luminance information stored in the storage, obtain a plurality of calibration effects by applying each of the plurality of grayscale adjustment curves to an input image, obtain a grayscale adjustment curve corresponding to a maximum calibration effect from among the plurality of calibration effects, adjust a grayscale of each pixel of the input image based on the obtained grayscale adjustment curve to generate an output image, and output the output image through the display.

Abstract: A device installed between a surface of a coating bath and an air knife equipment to produce a hot dip metal coated steel sheet to form a non-oxidation atmosphere in a surface of a coated steel sheet ascending from the coating bath, the device comprising: lower gas discharge bars spaced apart from the surface of the coating bath by a predetermined distance and discharging a non-oxidation gas in a direction of the surface of the coating bath along the surface of the coated steel sheet; a side cover extending upwardly slopingly in a direction of the coated steel sheet from the sides of the lower gas discharge bars; and upper gas discharge bars formed at an upper end of the side cover and discharging a non-oxidation gas downwardly.

Abstract: A reflective mask includes a first reflection layer disposed on a mask substrate, a first capping layer disposed on the first reflection layer, a second reflection pattern disposed on a portion of the first capping layer, and a phase shifter disposed between the second reflection pattern and the first capping layer to cause a phase difference between a first light reflecting from the first reflection layer and a second light reflecting from the second reflection pattern. Related methods are also provided.

Abstract: A reflective mask includes a first reflection layer disposed on a mask substrate, a first capping layer disposed on the first reflection layer, a second reflection pattern disposed on a portion of the first capping layer, and a phase shifter disposed between the second reflection pattern and the first capping layer to cause a phase difference between a first light reflecting from the first reflection layer and a second light reflecting from the second reflection pattern. Related methods are also provided.

Abstract: The device of the present invention can enhance the quality of surface appearance through a nitrogen curtain section facilitating oxidation suppressing at a lower end portion of an air knife to suppress an oxide from being generated from an upper portion of a coating bath and block adsorption of the oxide to the surface of a coated layer. This device includes lower gas discharge bars spaced apart from the surface of the coating bath by a predetermined distance and discharging a nitrogen gas in a direction of the surface of the coating bath along a circumference of the coated steel sheet; a side cover extending upwardly slopingly in a direction of the coated steel sheet from the sides of the lower gas discharge bars; and upper gas discharge bars formed at an upper end of the side cover and discharging a nitrogen gas downwardly.

Abstract: In a semiconductor device and a method for manufacturing the same, a pillar pattern is formed in an alternating pattern and a one side contact (OSC) is formed without using a tilted ion implantation process or a mask, resulting in formation of a vertical gate. The semiconductor device includes an alternating or zigzag-type pillar pattern formed over a semiconductor substrate, a first hole formed between pillars of the pillar pattern, a passivation layer formed over a sidewall of the first hole, a second hole formed by partially etching a lower part of the first hole, a bit line formed in the second hole, and a contact formed at a lower part of the pillar pattern.

Abstract: In a semiconductor device and a method for manufacturing the same, a pillar pattern is formed in an alternating pattern and a one side contact (OSC) is formed without using a tilted ion implantation process or a mask, resulting in formation of a vertical gate. The semiconductor device includes an alternating or zigzag-type pillar pattern formed over a semiconductor substrate, a first hole formed between pillars of the pillar pattern, a passivation layer formed over a sidewall of the first hole, a second hole formed by partially etching a lower part of the first hole, a bit line formed in the second hole, and a contact formed at a lower part of the pillar pattern.

Abstract: Disclosed is a method for producing a zinc-aluminum-based alloy-coated steel sheet with superior workability and corrosion resistance by coating a base zinc-aluminum-based alloy-coated steel sheet in a coating bath comprising 35 to 55% by weight of zinc, 0.5 to 3% by weight of silicon, 0.005 to 1.0% by weight of chromium, 0.01 to 3.0% by weight of magnesium, 0.001 to 0.1% by weight of titanium, and the balance of aluminum and inevitable impurities.

Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.

Abstract: Lithography processes are provided. The lithography process includes installing a reticle masking (REMA) part having a REMA open region in a lithography apparatus, loading a reticle including at least one reticle chip region in which circuit patterns are disposed into the lithography apparatus, and sequentially exposing a first wafer field, which includes a first chip region corresponding to the reticle chip region, and a second wafer field, which includes a second chip region corresponding to the reticle chip region, of a wafer to rays using the reticle and the REMA part to transfer images of the circuit patterns onto the wafer. An edge boundary of the REMA open region transferred on the first wafer field is located on a scribe lane region between the first and second chip regions while the first wafer field is exposed. Methods of manufacturing a semiconductor device using the lithography process are also provided.

Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.