Abstract: The present invention provides a process sequence and related hardware for filling a hole with copper. The sequence comprises first forming a reliable barrier layer in the hole to prevent diffusion of the copper into the dielectric layer through which the hole is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the bottom of the hole, depositing a second barrier, and then filling the hole with copper. An alternative sequence comprises depositing a first barrier layer over a blanket dielectric layer, forming a hole through both the barrier layer and the dielectric layer, depositing a generally conformal second barrier layer in the hole, removing the barrier layer from the bottom of the hole, and selectively filling the hole with copper.

Abstract: The present invention provides a process sequence and related hardware for filling a hole with copper. The sequence comprises first forming a reliable barrier layer in the hole to prevent diffusion of the copper into the dielectric layer through which the hole is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the bottom of the hole, depositing a second barrier, and then filling the hole with copper. An alternative sequence comprises depositing a first barrier layer over a blanket dielectric layer, forming a hole through both the barrier layer and the dielectric layer, depositing a generally conformal second barrier layer in the hole, removing the barrier layer from the bottom of the hole, and selectively filling the hole with copper.

Abstract: A thermodynamically stable metallic contact for binary oxide-, nitride-, carbide or phosphide-semiconductors and a method of its preparation, the contact is formed in a high temperature reaction in vacuum of a metal bi-layer with the binary semiconductor substrate. With a proper choice of the two metallic layers, each metal forms a single phase with only one of binary semiconductor elements. The resulting phases form distinct layers in a thermodynamically stable sequence.

Abstract: A method of processing a substrate, such as a semiconductor wafer, in a vacuum processing chamber includes the steps of depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases by flowing SiH4 into the chamber. Preferably, WSix is deposited on a semiconductor wafer using a mixture comprising WF6, dichlorosilane and a noble gas, and the chamber is subsequently purged of residual WF6 and dichlorosilane by flowing SiH4 into the chamber. A further method of processing a substrate in a vacuum processing chamber includes the step of conditioning the chamber by flowing SiH4 into the chamber prior to depositing a material on the surface of the substrate. Semiconductor wafers processed according to the inventive method are characterized by more uniform sheet resistance values and reduced film stress.

Abstract: A method of processing a substrate, such as a semiconductor wafer, in a vacuum processing chamber includes the steps of depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases by flowing SiH.sub.4 into the chamber. Preferably, WSi.sub.x is deposited on a semiconductor wafer using a mixture comprising WF.sub.6, dichlorosilane and a noble gas, and the chamber is subsequently purged of residual WF.sub.6 and dichlorosilane by flowing SiH.sub.4 into the chamber. A further method of processing a substrate in a vacuum processing chamber includes the step of conditioning the chamber by flowing SiH.sub.4 into the chamber prior to depositing a material on the surface of the substrate. Semiconductor wafers processed according to the inventive method are characterized by more uniform sheet resistance values and reduced film stress.

Abstract: A method of processing a substrate, such as a semiconductor wafer, in a vacuum processing chamber includes the steps of depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases by flowing SiH.sub.4 into the chamber. Preferably, WSi.sub.x is deposited on a semiconductor wafer using a mixture comprising WF.sub.6, dichlorosilane and a noble gas, and the chamber is subsequently purged of residual WF.sub.6 and dichlorosilane by flowing SiH.sub.4 into the chamber. A further method of processing a substrate in a vacuum processing chamber includes the step of conditioning the chamber by flowing SiH.sub.4 into the chamber prior to depositing a material on the surface of the substrate. Semiconductor wafers processed according to the inventive method are characterized by more uniform sheet resistance values and reduced film stress.

Abstract: A tungsten silicide film is deposited from WF.sub.6 and SiCl.sub.2 H.sub.2 onto a substrate so that the tungsten to silicon ratio is substantially uniform through the thickness of the WSi.sub.x film, and the WSi.sub.x film is substantially free of fluorine. The film can be deposited by a multi-stage process where the pressure in the chamber is varied, or by a high temperature, high pressure deposition process in a plasma cleaned deposition chamber. Preferably the SiCl.sub.2 H.sub.2 and the WF.sub.6 are mixed upstream of the deposition chamber. A seeding gas can be added to the process gases.

Abstract: A tungsten silicide film is deposited from WF.sub.6 and SiCl.sub.2 H.sub.2 onto a substrate so that the tungsten to silicon ratio is substantially uniform through the thickness of the WSi.sub.x film, and the WSi.sub.x film is substantially free of fluorine. The film can be deposited by a multi-stage process where the pressure in the chamber is varied, or by a high temperature, high pressure deposition process in a plasma cleaned deposition chamber. Preferably the SiCl.sub.2 H.sub.2 and the WF.sub.6 are mixed upstream of the deposition chamber. A seeding gas can be added to the process gases.

Abstract: An electrical contact between two film members that is stable over all conditions encountered in processing and over the device lifetime. The contact has a central multi-element diffusion barrier alloy layer having at least one elemental ingredient that does not react with either film member and at least one other elemental ingredient that reacts with the adjacent film member to form an intermediate layer between the diffusion barrier layer and each film member. A contact between aluminum wiring and silicon devices on an integrated circuit chip is provided with a diffusion barrier layer of for example, WPd with an intermediate layer on both sides, one side being PdSi next to the silicon and the other being AlPd.sub.3 next to the aluminum.

Abstract: Annealing a titanium-rich carbide film deposited on silicon produces, in a single processing step, both a stable titanium silicide contact and a titanium carbide diffusion barrier between the silicide and a subsequently formed overlying layer of aluminum. Reliable low-resistance contacts to VLSI devices are thereby provided in a cost-effective fabrication sequence.Other metallization systems, comprising a silicide and a diffusion barrier to aluminum formed in a single processing step, are also described.