Patents by Inventor Moshe ROSENWEIG

Moshe ROSENWEIG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11348001
    Abstract: There are provided system and method of classifying defects in a semiconductor specimen. The method comprises: upon obtaining by a computer a Deep Neural Network (DNN) trained to provide classification-related attributes enabling minimal defect classification error, processing a fabrication process (FP) sample using the obtained trained DNN; and, resulting from the processing, obtaining by the computer classification-related attributes characterizing the at least one defect to be classified, thereby enabling automated classification, in accordance with the obtained classification-related attributes, of the at least one defect presented in the FP image.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: May 31, 2022
    Assignee: APPLIED MATERIAL ISRAEL, LTD.
    Inventors: Leonid Karlinsky, Boaz Cohen, Idan Kaizerman, Efrat Rosenman, Amit Batikoff, Daniel Ravid, Moshe Rosenweig
  • Publication number: 20220067523
    Abstract: A computerized system and method of training a deep neural network (DNN) is provided. The DNN is trained in a first training cycle using a first training set including first training samples. Each first training sample includes at least one first training image synthetically generated based on design data. Upon receiving a user feedback with respect to the DNN trained using the first training set, a second training cycle is adjusted based on the user feedback by obtaining a second training set including augmented training samples. The DNN is re-trained using the second training set. The augmented training samples are obtained by augmenting at least part of the first training samples using defect-related synthetic data. The trained DNN is usable for examination of a semiconductor specimen.
    Type: Application
    Filed: November 8, 2021
    Publication date: March 3, 2022
    Inventors: Leonid KARLINSKY, Boaz COHEN, Idan KAIZERMAN, Efrat ROSENMAN, Amit BATIKOFF, Daniel RAVID, Moshe ROSENWEIG
  • Patent number: 11205119
    Abstract: There are provided system and method of examining a semiconductor specimen. The method comprises: upon obtaining a Deep Neural Network (DNN) trained for a given examination-related application within a semiconductor fabrication process, processing together one or more fabrication process (FP) images using the obtained trained DNN, wherein the DNN is trained using a training set comprising ground truth data specific for the given application; and obtaining examination-related data specific for the given application and characterizing at least one of the processed one or more FP images. The examination-related application can be, for example, classifying at least one defect presented by at least one FP image, segmenting the at least one FP image, detecting defects in the specimen presented by the at least one FP image, registering between at least two FP images, regression application enabling reconstructing the at least one FP image in correspondence with different examination modality, etc.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: December 21, 2021
    Assignee: Applied Materials Israel Ltd.
    Inventors: Leonid Karlinsky, Boaz Cohen, Idan Kaizerman, Efrat Rosenman, Amit Batikoff, Daniel Ravid, Moshe Rosenweig
  • Patent number: 11010665
    Abstract: There are provided system and method of segmentation a fabrication process (FP) image obtained in a fabrication of a semiconductor specimen. The method comprises: upon obtaining a Deep Neural Network (DNN) trained to provide segmentation-related data, processing a fabrication process (FP) sample using the obtained trained DNN and, resulting from the processing, obtaining by the computer segments-related data characterizing the FP image to be segmented, the obtained segments-related data usable for automated examination of the semiconductor specimen. The DNN is trained using a segmentation training set comprising a plurality of first training samples and ground truth data associated therewith, each first training sample comprises a training image; FP sample comprises the FP image to be segmented.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: May 18, 2021
    Assignee: Applied Material Israel, Ltd.
    Inventors: Leonid Karlinsky, Boaz Cohen, Idan Kaizerman, Efrat Rosenman, Amit Batikoff, Daniel Ravid, Moshe Rosenweig
  • Patent number: 10229241
    Abstract: Design information related to an irrelevant area of a first layer of semiconductor article may be received. The first layer may be manufactured by illuminating a lithographic mask during a lithographic process. First layer information associated with an outcome or an expected outcome of the illuminating of the lithographic mask during the lithographic process may be received. Information corresponding to a layout of an irrelevant area may be identified in the first layer information. A differentiating attribute that differentiates the layout of the irrelevant area from a layout of a relevant area of the first layer of the semiconductor article may be identified. The differentiating attribute may be used to determine one or more other irrelevant areas of the first layer of the semiconductor article.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: March 12, 2019
    Assignee: Applied Materials Israel LTD.
    Inventors: Ziv Parizat, Moshe Rosenweig
  • Publication number: 20180357357
    Abstract: Design information related to an irrelevant area of a first layer of semiconductor article may be received. The first layer may be manufactured by illuminating a lithographic mask during a lithographic process. First layer information associated with an outcome or an expected outcome of the illuminating of the lithographic mask during the lithographic process may be received. Information corresponding to a layout of an irrelevant area may be identified in the first layer information. A differentiating attribute that differentiates the layout of the irrelevant area from a layout of a relevant area of the first layer of the semiconductor article may be identified. The differentiating attribute may be used to determine one or more other irrelevant areas of the first layer of the semiconductor article.
    Type: Application
    Filed: August 20, 2018
    Publication date: December 13, 2018
    Inventors: Ziv Parizat, Moshe Rosenweig
  • Patent number: 10055534
    Abstract: A system for design based inspection of a lithographic mask of a first layer of an article, the system may include a decision module and a memory module; wherein the memory module is configured to store (a) first layer information about an outcome of an illumination of the lithographic mask during a lithographic process, (b) design information related to an irrelevant area to be removed from the first layer of the article after a manufacturing of the first layer of the article; and wherein the decision module is configured to process the first layer information to detect lithographic mask defects and to reduce a significance of a lithographic mask defect that is positioned within the irrelevant area.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: August 21, 2018
    Assignee: APPLIED MATERIALS ISRAEL LTD.
    Inventors: Ziv Parizat, Moshe Rosenweig
  • Patent number: 9904995
    Abstract: An inspection system that may include a processor and a memory module; wherein the memory module is configured to store a first image of an area of an object and a second image of the area of the object; wherein the processor is configured to generate a synthetic image of the area of the object, and to compare the synthetic image to the second image to provide defect detection results.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: February 27, 2018
    Assignee: APPLIED MATERIALS ISRAEL, LTD.
    Inventors: Leonid Karlinsky, Moshe Rosenweig, Boaz Cohen
  • Publication number: 20170364798
    Abstract: There are provided system and method of classifying defects in a semiconductor specimen. The method comprises: upon obtaining by a computer a Deep Neural Network (DNN) trained to provide classification-related attributes enabling minimal defect classification error, processing a fabrication process (FP) sample using the obtained trained DNN; and, resulting from the processing, obtaining by the computer classification-related attributes characterizing the at least one defect to be classified, thereby enabling automated classification, in accordance with the obtained classification-related attributes, of the at least one defect presented in the FP image.
    Type: Application
    Filed: August 11, 2017
    Publication date: December 21, 2017
    Inventors: Leonid KARLINSKY, Boaz COHEN, Idan KAIZERMAN, Efrat ROSENMAN, Amit BATIKOFF, Daniel RAVID, Moshe ROSENWEIG
  • Publication number: 20170357895
    Abstract: There are provided system and method of segmentation a fabrication process (FP) image obtained in a fabrication of a semiconductor specimen. The method comprises: upon obtaining a Deep Neural Network (DNN) trained to provide segmentation-related data, processing a fabrication process (FP) sample using the obtained trained DNN and, resulting from the processing, obtaining by the computer segments-related data characterizing the FP image to be segmented, the obtained segments-related data usable for automated examination of the semiconductor specimen. The DNN is trained using a segmentation training set comprising a plurality of first training samples and ground truth data associated therewith, each first training sample comprises a training image; FP sample comprises the FP image to be segmented.
    Type: Application
    Filed: August 3, 2017
    Publication date: December 14, 2017
    Inventors: Leonid KARLINSKY, Boaz COHEN, Idan KAIZERMAN, Efrat ROSENMAN, Amit BATIKOFF, Daniel RAVID, Moshe ROSENWEIG
  • Publication number: 20170270232
    Abstract: A system for design based inspection of a lithographic mask of a first layer of an article, the system may include a decision module and a memory module; wherein the memory module is configured to store (a) first layer information about an outcome of an illumination of the lithographic mask during a lithographic process, (b) design information related to an irrelevant area to be removed from the first layer of the article after a manufacturing of the first layer of the article; and wherein the decision module is configured to process the first layer information to detect lithographic mask defects and to reduce a significance of a lithographic mask defect that is positioned within the irrelevant area.
    Type: Application
    Filed: March 17, 2016
    Publication date: September 21, 2017
    Inventors: Ziv PARIZAT, Moshe ROSENWEIG
  • Publication number: 20170177997
    Abstract: There are provided system and method of examining a semiconductor specimen. The method comprises: upon obtaining a Deep Neural Network (DNN) trained for a given examination-related application within a semiconductor fabrication process, processing together one or more fabrication process (FP) images using the obtained trained DNN, wherein the DNN is trained using a training set comprising ground truth data specific for the given application; and obtaining examination-related data specific for the given application and characterizing at least one of the processed one or more FP images. The examination-related application can be, for example, classifying at least one defect presented by at least one FP image, segmenting the at least one FP image, detecting defects in the specimen presented by the at least one FP image, registering between at least two FP images, regression application enabling reconstructing the at least one FP image in correspondence with different examination modality, etc.
    Type: Application
    Filed: December 19, 2016
    Publication date: June 22, 2017
    Inventors: Leonid KARLINSKY, Boaz COHEN, Idan KAIZERMAN, Efrat ROSENMAN, Amit BATIKOFF, Daniel RAVID, Moshe ROSENWEIG
  • Publication number: 20170169554
    Abstract: An inspection system that may include a processor and a memory module; wherein the memory module is configured to store a first image of an area of an object and a second image of the area of the object; wherein the processor is configured to generate a synthetic image of the area of the object, and to compare the synthetic image to the second image to provide defect detection results.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 15, 2017
    Inventors: Leonid KARLINSKY, Moshe ROSENWEIG, Boaz COHEN