Patents by Inventor Mu-Yuan Chen

Mu-Yuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7882621
    Abstract: A method for making chip resistor components includes: (a) forming a plurality of first and second notches in a substrate so as to form resistor-forming strips; (b) forming pairs of upper and lower electrodes on each of the resistor-forming strips; (c) forming a resistor film on each of the resistor-forming strips; (d) forming an insulator layer on the resistor film; (e) forming a hole pattern in the insulator layer and the resistor film; (f) forming an insulating shield layer on the insulator layer; (g) cleaving the substrate along the first notches so as to form a plurality of strip-like semi-finished products; (h) forming a pair of side electrodes on two opposite sides of each of the semi-finished products; and (i) cleaving each of the semi-finished products.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: February 8, 2011
    Assignee: Yageo Corporation
    Inventors: Mu-Yuan Chen, Wen-Feng Wu, Chi-Pin Chang, Kao-Po Chien
  • Publication number: 20090217511
    Abstract: A method for making chip resistor components includes: (a) forming a plurality of first and second notches in a substrate so as to form resistor-forming strips; (b) forming pairs of upper and lower electrodes on each of the resistor-forming strips; (c) forming a resistor film on each of the resistor-forming strips; (d) forming an insulator layer on the resistor film; (e) forming a hole pattern in the insulator layer and the resistor film; (f) forming an insulating shield layer on the insulator layer; (g) cleaving the substrate along the first notches so as to form a plurality of strip-like semi-finished products; (h) forming a pair of side electrodes on two opposite sides of each of the semi-finished products; and (i) cleaving each of the semi-finished products.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 3, 2009
    Applicant: YAGEO CORPORATION
    Inventors: Mu-Yuan Chen, Wen-Feng Wu, Chi-Pin Chang, Kao-Po Chien
  • Publication number: 20060172062
    Abstract: A method for manufacturing a plating seed layer of electronic elements uses a guiding plate to direct one or more electronic element into insertion holes of a holding plate. Each of the insertion holes has an elastic member to hold the electronic element firmly with two ends thereof exposed outside the holding plate. Finally, a metal film is formed on the surfaces of the two ends of the electronic element through a semiconductor manufacturing process (such as sputtering, vapor vaporization, or the like) to become the seed layer required for plating.
    Type: Application
    Filed: January 28, 2005
    Publication date: August 3, 2006
    Inventor: Mu-Yuan Chen
  • Patent number: 6322711
    Abstract: A method for forming a thin film resistor. There is first provided an insulator substrate. There is then formed upon the insulator substrate a blanket thin film resistive layer. There is then removed through a non-photolithographic etching method a portion of the blanket thin film resistive layer to form upon the substrate a patterned thin film resistive layer. Finally, there is then formed through a non-photolithographic printing method upon the patterned thin film resistive layer a patterned conductor lead layer. Alternatively, the portion of the blanket thin film resistive layer may be removed to form the patterned thin film resistive layer after the patterned conductor lead layer is formed upon the blanket thin film resistive layer.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: November 27, 2001
    Assignee: Yageo Corporation
    Inventor: Wood Mu-Yuan Chen
  • Patent number: 5976392
    Abstract: A method for forming a thin film resistor. There is first provided an insulator substrate. There is then formed upon the insulator substrate a blanket thin film resistive layer. There is then removed through a non-photolithographic etching method a portion of the blanket thin film resistive layer to form upon the substrate a patterned thin film resistive layer. Finally, there is then formed through a non-photolithographic printing method upon the patterned thin film resistive layer a patterned conductor lead layer. Alternatively, the portion of the blanket thin film resistive layer may be removed to form the patterned thin film resistive layer after the patterned conductor lead layer is formed upon the blanket thin film resistive layer.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: November 2, 1999
    Assignee: Yageo Corporation
    Inventor: Wood Mu-Yuan Chen