Abstract: A method and apparatus for anti-islanding of distributed power generation systems having an inverter comprising a phase locked loop (PLL), a phase shift generator for injecting a phase shift into the PLL during at least one sample period, and a phase error signature monitor for monitoring at least one phase error response of the PLL during the at least one sample period.

Abstract: A method and apparatus for converting DC input power to DC output power. The apparatus comprises a plurality of parallel connected flyback circuits. A controller is coupled to the switches within the flyback circuits to provide accurate timing and automatic current balancing amongst the plurality of flyback circuits.

Abstract: An apparatus and method for converting a DC input power to a DC output power. The apparatus comprises an energy storage module and a burst mode controller. The burst mode controller causes energy to be stored in the energy storage module during at least one storage period, and further causes the energy to be drawn from the energy storage module during at least one burst period. During the at least one burst period, the DC output power is greater than the DC input power. Additionally, the burst mode controller employs a maximum power point tracking (MPPT) technique for operating a device providing the DC input power proximate a maximum power point (MPP).

Abstract: A method and apparatus for anti-islanding of distributed power generation systems having an inverter comprising a phase locked loop (PLL), a phase shift generator for injecting a phase shift into the PLL during at least one sample period, and a phase error signature monitor for monitoring at least one phase error response of the PLL during the at least one sample period.

Abstract: A scheme for implementing GFR service in an ATM environment, e.g., an access node's ATM switch fabric. Regulation of a GFR flow is throttled between two modes, a guaranteed rate mode and a non-guaranteed rate mode, depending upon timestamps computed by applicable traffic policer/shaper algorithms. A scheduler is operably coupled to a policing block for scheduling cells from a guaranteed flow queue for transport via the ATM fabric at a guaranteed rate upon determining the onset of a guaranteed service frame. The scheduler switches to non-guaranteed rate mode for scheduling cells from the flow queue at a non-guaranteed rate when a timestamp (TSNGF) for transmission at the non-guaranteed rate is earlier than a timestamp (TSGF) for transmission of a next guaranteed service frame at the guaranteed rate.

Abstract: A hierarchical scheduler architecture for use with an access node terminal disposed in an access network portion. Ingress flows aggregated via a plurality of aggregation layers are switched through an ATM fabric that segregates flow cells based on service priority categories (planes). Thus, a two-dimensional scheduler employs arbitration on a per-aggregation layer, per-service priority basis, wherein each layer is responsible for selecting the most eligible flow from the constituent flows of that layer, which is forwarded to the next layer for arbitration. A service-based arbiter selects overall winner cells for emission through the fabric from winner cells generated for each service plane.

Abstract: A multicast scheme for scheduling a root flow in an ATM environment. A buffer system including an index memory is operable to contain a plurality of leaf flow index values associated with the leaves and a root flow index associated with the root flow from the ingress interface. A pointer memory is provided wherein a plurality of circularly-linked pointers are indexed from the leaf and root flows. A cell memory is provided with a plurality of cell memory locations to which the linked pointers point. Root flow cells in the ATM environment are stored in the cell memory locations based on the root flow index. When a particular flow becomes eligible for scheduling, a copy of a root cell is obtained for emission, the root cell being located in a cell memory location that is pointed to by a linked pointer, to which the particular leaf flow is indexed.

Abstract: A calendar heap structure and method for sorting N timestamp (TS) values in an ATM fabric scheduler implemented in an access network element. The heap structure is implemented using a radix value (R) for grouping the N TS values into a number of groups. Validity bits associated with the TS values are hierarchically arranged in a tree having logR(N) levels, wherein the bottom layer's N bits correspond to pointers that point to linked lists of flows with respective TS values. Starting from the top level heap, each subsequent level's heaps are successively examined for determining which particular heap obtains a minimum value until a particular validity bit of the bottom level is reached, which validity bit points to the minimum TS.

Abstract: The present invention relates to an apparatus and a method for bridging of Ethernet frames between a subscriber LAN and the ATM network. In accordance with the invention a novel (time window discovery) method is used, with coordination of the network administrator and an access management system to provision a network bridging element or bridge with a set of provisioned devices authorized to forward data packets across the bridge. The bridge is allowed within a time window to learn machine-specific MAC addresses for the provisioned table. After the window is expired, or terminated by access management system, the bridge is switched back to learning mode to learn additional MAC addresses for a learned table in the traditional manner. The devices learned during the learning phase are not authorized to forward data packets across the bridge.

Abstract: A hierarchical scheduler architecture for use with an access node terminal disposed in an access network portion. Ingress flows aggregated via a plurality of aggregation layers are switched through an ATM fabric that segregates flow cells based on service priority categories (planes). Thus, a two-dimensional scheduler employs arbitration on a per-aggregation layer, per-service priority basis, wherein each layer is responsible for selecting the most eligible flow from the constituent flows of that layer, which is forwarded to the next layer for arbitration. A service-based arbiter selects overall winner cells for emission through the fabric from winner cells generated for each service plane.

Abstract: A calendar heap structure and method for sorting N timestamp (TS) values in an ATM fabric scheduler implemented in an access network element. The heap structure is implemented using a radix value (R) for grouping the N TS values into a number of groups. Validity bits associated with the TS values are hierarchically arranged in a tree having logR(N) levels, wherein the bottom layer's N bits correspond to pointers that point to linked lists of flows with respective TS values. Starting from the top level heap, each subsequent level's heaps are successively examined for determining which particular heap obtains a minimum value until a particular validity bit of the bottom level is reached, which validity bit points to the minimum TS.

Abstract: A scheme for implementing GFR service in an ATM environment, e.g., an access node's ATM switch fabric. Regulation of a GFR flow is throttled between two modes, a guaranteed rate mode and a non-guaranteed rate mode, depending upon timestamps computed by applicable traffic policer/shaper algorithms. A scheduler is operably coupled to a policing block for scheduling cells from a guaranteed flow queue for transport via the ATM fabric at a guaranteed rate upon determining the onset of a guaranteed service frame. The scheduler switches to non-guaranteed rate mode for scheduling cells from the flow queue at a non-guaranteed rate when a timestamp (TSNGF) for transmission at the non-guaranteed rate is earlier than a timestamp (TSGF) for transmission of a next guaranteed service frame at the guaranteed rate.

Abstract: A Virtual Group Connection (VGC) scheme for grouping ATM connections. A plurality of VPCs, VCCs, or both are managed together as a single virtual data pipe having a pool of common connection resources (e.g., bandwidth, buffering, etc.) associated therewith. Shaping, grooming, policing, switching, and other traffic engineering operations may be performed on a VGC as a single connection hierarchy operable to be associated with a single customer.

Abstract: A multicast scheme for scheduling a root flow in an ATM environment. A buffer system including an index memory is operable to contain a plurality of leaf flow index values associated with the leaves and a root flow index associated with the root flow from the ingress interface. A pointer memory is provided wherein a plurality of circularly-linked pointers are indexed from the leaf and root flows. A cell memory is provided with a plurality of cell memory locations to which the linked pointers point. Root flow cells in the ATM environment are stored in the cell memory locations based on the root flow index. When a particular flow becomes eligible for scheduling, a copy of a root cell is obtained for emission, the root cell being located in a cell memory location that is pointed to by a linked pointer, to which the particular leaf flow is indexed.