Patents by Inventor Munehiro Fujita

Munehiro Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12002535
    Abstract: A semiconductor device in which energy required for data transfer between an arithmetic device and a memory is reduced is provided. The semiconductor device includes a peripheral circuit and a memory cell array. The peripheral circuit has a function of a driver circuit and a control circuit for the memory cell array, and an arithmetic function. The peripheral circuit includes a sense amplifier circuit and an arithmetic circuit, and the memory cell array includes a memory cell and a bit line. The sense amplifier circuit has a function of determining whether the bit line is at a high level or a low level, and outputs the result to the arithmetic circuit. The arithmetic circuit has a function of performing a product-sum operation, the result of which is output from the semiconductor device.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: June 4, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Aoki, Munehiro Kozuma, Masashi Fujita, Takahiko Ishizu
  • Publication number: 20160084305
    Abstract: An assembly including an outer component defining a bore, an inner component disposed in the bore, and a tolerance ring disposed between the outer component and the inner component. The tolerance ring can include a sidewall and a plurality of projections extending radially outward from the sidewall. The outer component can define a groove containing a lubricant, wherein the groove extends circumferentially around the outer component, and wherein the groove axially aligns with at least one of the plurality of projections.
    Type: Application
    Filed: September 23, 2015
    Publication date: March 24, 2016
    Inventor: Munehiro Fujita