Patents by Inventor Munenori Hashimoto

Munenori Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8747579
    Abstract: A solder layer and an electronic device bonding substrate having high bonding strength of a device and low bonding failure even by a simplified bonding method of a device to a substrate and a method for manufacturing the same are provided. A device bonding substrate 1 including a substrate 2 and a lead free solder layer 5 formed on said substrate has a solder layer 5 consisting of a plurality of layers having mutually different phases, and oxygen concentration on the upper surface of the solder layer is lower than 30 atomic % of the concentration of the metal component which is the most oxidizable among the metal components making up the upper layer of the solder layer 5. Carbon concentration on the upper surface of the solder layer 5 may be lower than 10 atomic % of the concentration of the metal component which is the most oxidizable among the metal components making up the upper layer of the solder layer.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: June 10, 2014
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Yoshikazu Oshika, Munenori Hashimoto, Masayuki Nakano
  • Patent number: 8516692
    Abstract: A solder layer, a substrate for device joining utilizing the same and a method of manufacturing the substrate are provided whereby the device joined remains thermally unaffected, an initial bonding strength in solder joint is enhanced and the device can be soldered reliably. The solder layer formed on a base substrate (2) consists of a plurality of layers (5a) of a solder free from lead, which are different in its phase from one another. They are constituted by a layer of a phase that is completely melted, and a layer of a phase that is not completely melted at a temperature not less than a eutectic temperature of the solder. The solder layer (5) can be applied to a device joining substrate (1) comprising an electrode layer (4) formed on the base substrate (2) and the solder layer (5) formed on the electrode layer.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: August 27, 2013
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Yoshikazu Oshika, Munenori Hashimoto, Masayuki Nakano
  • Publication number: 20090095513
    Abstract: A solder layer, a substrate for device joining utilizing the same and a method of manufacturing the substrate are provided whereby the device joined remains thermally unaffected, an initial bonding strength in solder joint is enhanced and the device can be soldered reliably. The solder layer formed on a base substrate (2) consists of a plurality of layers (5a) of a solder free from lead, which are different in its phase from one another. They are constituted by a layer of a phase that is completely melted, and a layer of a phase that is not completely melted at a temperature not less than a eutectic temperature of the solder. The solder layer (5) can be applied to a device joining substrate (1) comprising an electrode layer (4) formed on the base substrate (2) and the solder layer (5) formed on the electrode layer.
    Type: Application
    Filed: March 28, 2007
    Publication date: April 16, 2009
    Inventors: Yoshikazu Oshika, Munenori Hashimoto, Masayuki Nakano
  • Publication number: 20080205013
    Abstract: A solder layer and an electronic device bonding substrate having high bonding strength of a device and low bonding failure even by a simplified bonding method of a device to a substrate and a method for manufacturing the same are provided. A device bonding substrate 1 including a substrate 2 and a lead free solder layer 5 formed on said substrate has a solder layer 5 consisting of a plurality of layers having mutually different phases, and oxygen concentration on the upper surface of the solder layer is lower than 30 atomic % of the concentration of the metal component which is the most oxidizable among the metal components making up the upper layer of the solder layer 5. Carbon concentration on the upper surface of the solder layer 5 may be lower than 10 atomic % of the concentration of the metal component which is the most oxidizable among the metal components making up the upper layer of the solder layer.
    Type: Application
    Filed: February 27, 2008
    Publication date: August 28, 2008
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yoshikazu OSHIKA, Munenori HASHIMOTO, Masayuki NAKANO
  • Publication number: 20070228105
    Abstract: A solder layer and an electronic device bonding substrate using the layer are provided which avoid deteriorating qualities of the electronic device to be bonded. In a solder layer 14 free from lead and formed on a substrate 11 or an electronic device bonding substrate 10 having such a solder layer, the solder layer 14 has a specific resistance of not more than 0.4 ?ยท?m. The electronic device bonding substrate 10 can have a thermal resistance of not more than 0.5 K/W and a thickness of not more than 10 ?m. Then, voids contained in the solder layer 14 have a maximum diameter of not more than 0.5 ?m and the substrate can be a submount substrate.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 4, 2007
    Inventors: Yoshikazu Oshika, Masayuki Nakano, Munenori Hashimoto