Patents by Inventor Muralikrishna Balaga

Muralikrishna Balaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11237729
    Abstract: An inversion encoder is configured to receive a plurality of bytes of data for parallel output to a data bus; determine, in parallel, Hamming distances of neighboring pairs of bytes of the received plurality of bytes of data; for each neighboring pair of bytes of the received plurality of bytes, determine, in parallel, for each of the neighboring pairs of bytes, whether a respective Hamming distance satisfies a majority function; if a respective Hamming distance for a particular pair of bytes of the neighboring pairs of bytes satisfies the majority function: set an inversion bit for a second byte of the particular pair of bytes to be the opposite of an inversion bit for a first byte of the particular pair of bytes; invert, or forgo inverting, the second byte based on the inversion bit for the second byte; and provide the second byte for output to the data bus.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: February 1, 2022
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Debasish Dwibedy, A Harihara Sravan, Nihal Singla, Muralikrishna Balaga
  • Patent number: 10020059
    Abstract: A memory device includes an electrical line operably coupled to a plurality of memory cells, and a switchable impedance driver operably coupled to the electrical line. An electronic circuit includes a first driver having a first output impedance, and a second driver having a second output impedance that is less than the first output impedance. The first driver and the second driver are operably coupled in parallel to an output of the electronic circuit. The electronic circuit includes logic circuitry to enable the second driver during switching of a digital output of the driver. A method includes driving an output with both the first driver and the second driver when an input switches between logic levels, and disabling the second driver when the output reaches a desired logic level following the switch between logic levels of the input.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: July 10, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Muralikrishna Balaga, Vinayak Ghatawade, Aditya Pradhan