Patents by Inventor Mustafa Acar

Mustafa Acar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240138129
    Abstract: One example discloses an on-chip shielded device, including: a planar structure including a substrate and a passivation layer; an electrical component formed within the substrate and coupled to an input signal path and an output signal path; a first shielding element positioned above the electrical component and the passivation layer; and a second shielding element positioned above the electrical component, the passivation layer and the first shielding element.
    Type: Application
    Filed: October 20, 2022
    Publication date: April 25, 2024
    Inventors: Philipp Franz Freidl, Mustafa Acar, Antonius Hendrikus Jozef Kamphuis, Erik Daniel Björk, Konstantinos Giannakidis, Jan Willem Bergman, Rajesh Mandamparambil, Paul Mattheijssen
  • Publication number: 20240106101
    Abstract: A circuit comprising: a common terminal, first terminal and second terminal, wherein the common terminal is coupled to a first and second circuit branch at a branch node; wherein the first/second circuit branches include a respective first/second quarter wavelength transmission line having a first end coupled to the branch node and a second end respectively coupled to the first/second terminal; wherein the first and second terminals are coupled together via a branch-interconnection arrangement; wherein the circuit comprises: a first switched arrangement comprising a first switch having a first and second switch-terminal, wherein the first switch-terminal is coupled to the common terminal, and wherein a first resistor and a first capacitor are arranged in parallel and coupled between the second switch-terminal and a reference terminal; and a second switched arrangement coupled to the first terminal, wherein the first quarter wavelength transmission line is coupled between the first and second switched arrangem
    Type: Application
    Filed: September 1, 2023
    Publication date: March 28, 2024
    Inventors: Xin Yang, Mustafa Acar, Zhe Chen, Dominicus MARTINUS WILHELMUS Leenaerts
  • Publication number: 20240098906
    Abstract: A circuit comprising: a digital attenuator part comprising: a first and second attenuator terminal; a first inductor having a first terminal coupled to the first attenuator terminal and a second terminal coupled to the second attenuator terminal; a first switched arrangement comprising a first switch having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the first terminal of the first inductor, and a first resistor and a first capacitor are arranged in parallel, coupled between the second switch-terminal and a reference voltage; and a second switched arrangement comprising a second switch having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the second terminal of the first inductor, and wherein a second resistor and a second capacitor are arranged in parallel and coupled between the second switch-terminal and the reference voltage.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 21, 2024
    Inventors: Xin Yang, Mustafa Acar, Zhe Chen, Dominicus MARTINUS WILHELMUS Leenaerts
  • Patent number: 11888204
    Abstract: A transmission line includes a signal conductor and one or more return conductors, one or more of which having a stepped multi-layer structure. The return conductors may be disposed at opposite sides of the signal conductor. The return conductors may be multi-layer structures. At least some layers of each return conductor may have a stepped arrangement that defines a curve, such as an exponential curve. Additionally or alternatively, the signal conductor may be a stepped multi-layer structure, where at least some layers of the signal conductor may define a curve, such as an exponential curve. The signal conductor may be disposed at one or more upper layers of the transmission line or may be embedded at one or more layers near the center of the transmission line.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: January 30, 2024
    Assignee: NXP B.V.
    Inventors: Mustafa Acar, Danny Wayling Chang, Dominicus Martinus Wilhelmus Leenaerts, Philipp Franz Freidl
  • Publication number: 20230402410
    Abstract: An RF package assembly includes a stacked package-on-package arrangement of a first substrate and a second substrate. Each of the first and second substrates include RF signal pads and ground pads. An interface region between the stacked substrates couples the RF signal pads and ground pads of the first substrate to corresponding pads of the second substrate. The interface region includes galvanic connection regions providing a galvanic connection between the each of the first substrate ground pads and each of the corresponding second substrate ground pads. The interface region includes dielectric regions between each of the first substrate RF signal pads and the corresponding second substrate RF signal pads so that RF signals transmitted between the two substrates are capacitively coupled.
    Type: Application
    Filed: May 11, 2023
    Publication date: December 14, 2023
    Inventors: Mustafa Acar, Paul Mattheijssen, Philipp Franz Freidl, Rajesh Mandamparambil, Jan Willem Bergman
  • Publication number: 20230387985
    Abstract: A beamformer device for a multiple-input, multiple-output (MIMO) antenna system and method of operating a beamformer device is described. the beamformer device includes a number of beamformer channels. Each beamformer channel includes a RF terminal, an antenna connection terminal; and a power detector having a power detector output, The beamformer device includes a digital control interface comprising a serial data input and a serial data output; a control input coupled to the serial data input; and a beamformer monitor output configured to be selectively coupled to either the serial data output or the power detector output of one of the beamformer channels.
    Type: Application
    Filed: April 25, 2023
    Publication date: November 30, 2023
    Inventors: Paul Mattheijssen, Mustafa Acar, Lucas Maria Florentinus De Maaijer
  • Publication number: 20230361443
    Abstract: A transmission line includes a signal conductor and one or more return conductors, one or more of which having a stepped multi-layer structure. The return conductors may be disposed at opposite sides of the signal conductor. The return conductors may be multi-layer structures. At least some layers of each return conductor may have a stepped arrangement that defines a curve, such as an exponential curve. Additionally or alternatively, the signal conductor may be a stepped multi-layer structure, where at least some layers of the signal conductor may define a curve, such as an exponential curve. The signal conductor may be disposed at one or more upper layers of the transmission line or may be embedded at one or more layers near the center of the transmission line.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 9, 2023
    Inventors: Mustafa Acar, Danny Wayling Chang, Dominicus Martinus Wilhelmus Leenaerts, Philipp Franz Freidl
  • Publication number: 20230290737
    Abstract: A flip chip device includes a substrate, an integrated circuit device, a mold compound, and a via. The substrate has a top side and a bottom side. The integrated circuit device is affixed to the bottom side of the substrate. The mold compound is affixed to the bottom side of the substrate. The via is affixed to the bottom side of the substrate. The via passes through the mold compound and is exposed at a bottom side of the mold compound. The via is coupled to a terminal of the integrated circuit device.
    Type: Application
    Filed: March 14, 2022
    Publication date: September 14, 2023
    Inventors: Antonius Hendrikus Jozef Kamphuis, Mustafa Acar, Philipp Franz Freidl, Rajesh Mandamparambil, Jan Willem Bergman
  • Publication number: 20230268667
    Abstract: A phased-array antenna system includes a substrate and a plurality of sub-arrays. Each sub-array comprises an array of patch antennas arranged on a first major surface of the substrate; a plurality of beamformer devices coupled to the array of patch antennas; a multi-channel up-down converter (UDC) and a combiner-splitter coupled to the multi-channel UDC. The combiner-splitter is configured to split a signal provided by the UDC and provide the signal to each of the plurality of beamformers and/or to combine signal provided by the plurality of beamformers and to provide the combined signal to the UDC. Each sub-array also includes an integrated device comprising the multi-channel UDC and the combiner-splitter. The integrated device and the plurality of beamformer devices is arranged on a second major surface of the substrate opposite the first major surface. The integrated device is arranged between at least two beamformer devices.
    Type: Application
    Filed: January 30, 2023
    Publication date: August 24, 2023
    Inventors: Mustafa Acar, Lucas Maria Florentinus De Maaijer, Paul Mattheijssen
  • Publication number: 20230261374
    Abstract: A multiple-input multiple-output (MIMO) antenna system for a mobile cellular network and method is described. The MIMO antenna system includes an array of dual-polarization patch antennas each having first and second polarization feed-points, a first polarization radio chain and a second polarization radio chain. The MIMO antenna system includes a beamformer coupled to the first and second polarization radio chains. The beamformer includes a beamformer channel for a respective feedpoint and further includes a transmit amplifier and a detector (coupler) coupled to a transmit amplifier output. In one mode of operation, a signal is transmitted via the first polarization feed-point of a dual-polarisation patch antennas and a replica of the transmitted signal may be sensed using the coupler at the output of the transmit amplifier and routed via the second polarization radio chain to a digital predistortion module.
    Type: Application
    Filed: November 2, 2022
    Publication date: August 17, 2023
    Inventors: Lucas Maria Florentinus De Maaijer, Mustafa Acar, Paul Mattheijssen
  • Publication number: 20230189492
    Abstract: A Radio Frequency, “RF”, component and a method of making the same. The component comprises a first electrically conductive signal member for conveying an RF signal and a second electrically conductive signal member for conveying an RF signal. The component also comprises a barrier located between the first signal member and the second signal member electromagnetically to shield the first and second signal members from each other. The barrier comprises a first row of electrically conductive shielding members spaced apart along a longitudinal axis of the first row, and a second row of electrically conductive shielding members spaced apart along a longitudinal axis of the second row. Each shielding member comprises a polyhedron. The shielding members of the first row are offset with respect to the shielding members of the second row to prevent a direct line of sight between the first signal member and the second signal member.
    Type: Application
    Filed: November 29, 2022
    Publication date: June 15, 2023
    Inventors: Philipp Franz Freidl, Mustafa Acar, Antonius Hendrikus Jozef Kamphuis, Jan Willem Bergman
  • Publication number: 20230170945
    Abstract: A multiple-input multiple-output (MIMO) antenna system for a mobile cellular network and method is described. The MIMO antenna system includes an array of dual-polarization patch antennas each having first and second polarization feed-points. A signal is transmitted via the first polarization feed-point of a dual-polarisation patch antennas and a replica of the transmitted signal is sensed (detected) using the second polarization feed-point of the same patch antenna. This replica signal is used by a digital predistortion module to apply predistortion to a subsequently transmitted signal.
    Type: Application
    Filed: November 7, 2022
    Publication date: June 1, 2023
    Inventors: Lucas Maria Florentinus De Maaijer, Mustafa Acar, Paul Mattheijssen
  • Patent number: 11574760
    Abstract: An inductor and a method of making an inductor. The inductor includes a stack of dielectric layers. The inductor also includes a plurality of metal levels comprising patterned metallic features of the inductor. Each metal level is located at an interface between adjacent dielectric layers in the stack. The patterned metallic features include a first plurality of inductor windings arranged in a substantially flat spiral in one of the metal levels. The patterned metallic features also include a second plurality of inductor windings in which each winding is located in a respective one of the plurality of metal levels. The first plurality of windings is connected in series with the second plurality of windings.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: February 7, 2023
    Assignee: NXP B.V.
    Inventors: Mustafa Acar, Jawad Hussain Qureshi, Mark Pieter van der Heijden
  • Publication number: 20230008852
    Abstract: A transmission line. The transmission line includes a reference electrode. The transmission line also includes a stripline. The stripline meanders within a plane. The stripline has a non-planar profile when viewed along a direction parallel to the plane.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 12, 2023
    Inventors: Mustafa Acar, Philipp Franz Freidl, Dominicus MARTINUS WILHELMUS Leenaerts
  • Publication number: 20220384943
    Abstract: A semiconductor device may include an antenna array and a grounding assembly configured to at least partially electrically shield the antenna array. The grounding assembly may include a first grounding layer comprising a first plurality of openings and a second grounding layer comprising a second plurality of openings. The second grounding layer may at least partially occlude the first plurality of openings of the first grounding layer when viewed from above the antenna array.
    Type: Application
    Filed: May 19, 2022
    Publication date: December 1, 2022
    Inventors: Mustafa Acar, Philipp Franz Freidl, Antonius Hendrikus Jozef Kamphuis, Jan Willem Bergman, Rajesh Mandamparambil
  • Publication number: 20220311137
    Abstract: An integrated circuit comprising a package, phased antenna array and die. The die comprises a plurality of unit cells, wherein each unit cell is divided into quadrants. Each quadrant comprises a receiver terminal located on a first axis, and a transmitter terminal located on a second axis, wherein the first axis is orthogonal to the second axis, and there is mirror symmetry between the nearest neighbour quadrants in the unit cell. The package comprises a plurality of pairs of feed lines, each pair of feed lines comprising a receiver feed line and a transmitter feed line. The receiver feed line is connected to one of the receiver terminals and the transmitter feed line is connected to the transmitter terminal in the same die quadrant. The receiver feed line is orthogonal to the transmitter feed line. Each antenna element is coupled to a respective pair of feed lines.
    Type: Application
    Filed: February 21, 2022
    Publication date: September 29, 2022
    Inventors: Jan Willem Bergman, Mustafa Acar, Antonius Hendrikus Jozef Kamphuis, Dominicus MARTINUS WILHELMUS Leenaerts, Rajesh Mandamparambil, Paul Mattheijssen
  • Publication number: 20220263222
    Abstract: A semiconductor device comprising a substrate, a first integrated circuit package mounted on the substrate, the first integrated circuit package comprising a first antenna sub-array having a uniform pitch, and a second integrated circuit package mounted on the substrate, the second integrated circuit package comprising a second antenna sub-array having a uniform pitch. The second integrated circuit package is mounted adjacent to the first integrated circuit package to form a multi-package module having an antenna array formed of the first antenna sub-array and the second antenna sub-array, wherein the antenna array has a uniform pitch. Also provided is a method of manufacturing a multi-package module and a method of providing package-to-package grounding.
    Type: Application
    Filed: February 2, 2022
    Publication date: August 18, 2022
    Inventors: Antonius Hendrikus Jozef Kamphuis, Jan Willem Bergman, Marcellinus Johannes Maria Geurts, Mustafa Acar, Paul Mattheijssen, Rajesh Mandamparambil, Andrei-Alexandru Damian, Amar Ashok Mavinkurve
  • Publication number: 20210359388
    Abstract: A power combiner/splitter for multiple input multiple output (MIMO) applications and a method of making the same. A metallisation stack has a plurality of layers including patterned metal features forming first and second branched arrangements of the power combiner/splitter. Each branched arrangement includes a port located at one end of that branched arrangement, and a plurality of further ports. Each branched arrangement also includes a plurality of bifurcated branches extending between each end of that branched arrangement for dividing/combining a signal passing through that branched arrangement between the port and the plurality of further ports. The metallisation stack further includes a common ground plane that is shared by the first and second branched arrangements. At least some of the patterned metal features forming the first branched arrangement overlie at least some of the patterned metal features forming the second branched arrangement.
    Type: Application
    Filed: May 7, 2021
    Publication date: November 18, 2021
    Inventors: Olivier Tesson, Mustafa Acar
  • Publication number: 20210257358
    Abstract: A semiconductor device is described including a substrate and a plurality of layers. The semiconductor device includes a cascode arrangement of a first bipolar transistor and a second bipolar transistor. A first-bipolar-transistor-collector of the first bipolar transistor and a second-bipolar-transistor-emitter of the second bipolar transistor are at least partially located in a common region in the same layer of the semiconductor device.
    Type: Application
    Filed: February 16, 2021
    Publication date: August 19, 2021
    Inventors: Petrus Hubertus Cornelis Magnee, Mustafa Acar, Dominicus Martinus Wilhelmus Leenaerts
  • Patent number: 10876627
    Abstract: Calibration and simulation techniques for modeled gear shift events of an automatic transmission of a vehicle comprise obtaining a set of parameters for a modeled gear shift event of the transmission and, based on the set of parameters, modeling forward/aft vehicle acceleration caused by the modeled gear shift event. A shift quality rating system is the utilized to obtain a shift quality rating of the modeled gear shift event based on at least one of the set of parameters and the modeled forward/aft vehicle acceleration. Finally, the techniques determine whether the determined shift quality rating satisfies a shift quality rating threshold and, when the determined shift quality rating fails to satisfy the shift quality rating threshold, a gear ratio gradient for the modeled gear shift event is adjusted and the process is repeated until the determined shift quality rating satisfies the shift quality rating threshold.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: December 29, 2020
    Assignee: FCA US LLC
    Inventors: Ryan J Monroe, Mustafa Acar, Avinash Jonnalagadda, Bruce K Geist, Timothy J White, Cory E Bruckner