Patents by Inventor Mustafa Altintas

Mustafa Altintas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Deinterleaver and dual-viterbi decoder architecture
    Patent number: 7779338
    Abstract: Pairs of parallel Viterbi decoders use windowed block data for decoding data at rates above 320 Mbps. Memory banks of the deinterleavers feeding the decoders operate such that some are receiving data while others are sending data to the decoders. Parallel input streams to every pair of decoders overlap for several traceback lengths of the decoder causing data input to a first decoder at the end of an input stream to be the same as the data input to a second decoder of the same pair at the beginning of an input stream. Then, the first decoder is able to post-synchronize its path metric with the second decoder and the second decoder is able to pre-synchronize its path metric with the first. Either, the deinterleaver data length is an integer multiple of the traceback length or the data input to only the first block of the first interleaver is padded.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: August 17, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventors: Mustafa Altintas, Turgut Aytur, Ravishankar H. Mahadevappa, Feng Shi, Stephan ten Brink, Ran Yan
  • Deinterleaver and dual-viterbi decoder architecture
    Publication number: 20070067704
    Abstract: Pairs of parallel Viterbi decoders use windowed block data for decoding data at rates above 320 Mbps. Memory banks of the deinterleavers feeding the decoders operate such that some are receiving data while others are sending data to the decoders. Parallel input streams to every pair of decoders overlap for several traceback lengths of the decoder causing data input to a first decoder at the end of an input stream to be the same as the data input to a second decoder of the same pair at the beginning of an input stream. Then, the first decoder is able to post-synchronize its path metric with the second decoder and the second decoder is able to pre-synchronize its path metric with the first. Either, the deinterleaver data length is an integer multiple of the traceback length or the data input to only the first block of the first interleaver is padded.
    Type: Application
    Filed: July 21, 2006
    Publication date: March 22, 2007
    Inventors: Mustafa Altintas, Turgut Aytur, Ravishankar Mahadevappa, Feng Shi, Stephan Brink, Ran Yan