Abstract: To improve the convenience of a user and further provide service comfortable and safe for the user. A PK storing PMD as personal related information of a user communicates with a service system. When first using the service system, the PK stores the service ID of the service system and a spoofing preventing method. When the PK communicates with the service system for a second time and thereafter, a spoofing preventing process is mutually performed, and then the PMD is provided to the service system. The service system reads or changes the PMD on the basis of access permission information set in advance by the user. The present disclosure is applicable to PDAs.

Abstract: To improve the convenience of a user and further provide service comfortable and safe for the user. A PK 22 storing PMD as personal related information of a user 20 communicates with a service system 24. When first using the service system 24, the PK 22 stores the service ID of the service system 24 and a spoofing preventing method. When the PK 22 communicates with the service system 24 for a second time and thereafter, a spoofing preventing process is mutually performed, and then the PMD is provided to the service system 24. The service system 24 reads or changes the PMD on the basis of access permission information set in advance by the user 20. The present invention is applicable to PDAs.

Abstract: To improve the convenience of a user and further provide service comfortable and safe for the user. A PK storing PMD as personal related information of a user communicates with a service system. When first using the service system, the PK stores the service ID of the service system and a spoofing preventing method. When the PK communicates with the service system for a second time and thereafter, a spoofing preventing process is mutually performed, and then the PMD is provided to the service system. The service system reads or changes the PMD on the basis of access permission information set in advance by the user. The present disclosure is applicable to PDAs.

Abstract: There is provided a memory device capable of stably storing recorded data over a long term of several decades or longer and capable of reliably reading stored data. A first circuit 200 and a second circuit 300 are separately implementable, and the first circuit 200 includes a data recording circuit 210 reading recorded data from an address appointed by an address signal when a read/write signal stays at a first level and writing data to the address appointed by the address signal when the read/write signal stays at a second level, and a write/read control circuit 230 performing data write/read control on the data recording circuit according to the address signal in response to a read or write instruction from the second circuit.

Abstract: A shared memory device is disclosed which includes: a plurality of processor elements; a plurality of memory modules configured to be accessible by the plurality of processor elements; and a connection device configured to enable a specific processor element out of the plurality of processor elements to access a specific memory module out of the plurality of memory modules; wherein the plurality of processor elements are allowed to access via the connection device a plurality of memory systems each constituted by at least one memory module; and wherein each of the plurality of memory systems accessible by different processor elements allows the plurality of memory modules to be partially shared and accessed by the different processor elements.

Abstract: History memory 430 correlates the input values and execution result of a function for each piece of function identification information, and holds as an execution history. A command decoder 320 supplies function identification information included in a previous notice command for predicting the function from a fetch unit 310 to an execution history search unit 410. Also, the command decoder 320 causes the execution history search unit 410 to obtain the input value output from an input selecting unit 332 based on, of commands to be read out after the previous notice command, an input value setting command for setting a function input value. The execution history search unit 410 searches an execution history agreeing with the obtained identification information and input values thereof before a function call-up command. An execution result output unit 420 outputs the execution result detected by the execution history search unit 410 to an executing unit 330.

Abstract: There is provided a memory device capable of stably storing recorded data over a long term of several decades or longer and capable of reliably reading stored data. A first circuit 200 and a second circuit 300 are separately implementable, and the first circuit 200 includes a data recording circuit 210 reading recorded data from an address appointed by an address signal when a read/write signal stays at a first level and writing data to the address appointed by the address signal when the read/write signal stays at a second level, and a write/read control circuit 230 performing data write/read control on the data recording circuit according to the address signal in response to a read or write instruction from the second circuit.

Abstract: Disclosed herein is a semiconductor chip including: a plurality of processing devices that can communicate with each other; wherein each of the processing devices includes an arithmetic unit, an individual memory connected to the arithmetic unit on a one-to-one basis, and a control unit configured to independently control turning on and off of operation of the arithmetic unit and the individual memory.

Abstract: Disclosed herein is a semiconductor chip including at least two processing apparatuses which comply with the same interface specifications and which differ in internal structure, wherein at least one of the processing apparatuses is constituted functionally to replace at least one processing apparatus.

Abstract: The present invention is intended to surely provide optimum information to users. A PK (Personal Key) stores PMDs (Personal Meta Data) that provide the information about each user. Of these PMDs, only those permitted for provision to a service system are transmitted to the service system by means of the quasi electrostatic field communication that is controlled by the range between the body of each user and an antenna. The service system receives the PMDs transmitted from the PK through the quasi electrostatic field communication. Further, on the basis of the received PMDs, the service system gets, from a content database, the content to be provided to each user and displays the obtained content onto an output device, thereby providing the content to each user. The present invention is applicable to a situated information presentation system, for example.

Abstract: An image processing apparatus capable of performing flexible, high speed processing, wherein a memory region emptied due to a change of display resolution can be used as a texture memory, increase of an overhead such as switching pages can be prevented, and a decline in the performance is not caused. A built-in DRAM inside a semiconductor chip has a configuration for storing display data and the texture data required by at least one graphic element. The texture data can be stored in portions other than the display regions, so the built-in DRAM can be used efficiently and an image processing apparatus achieving both high speed operation and a reduction of power consumption can be realized.

Abstract: Disclosed herein is a semiconductor chip including: a plurality of processing devices that can communicate with each other; wherein each of the processing devices includes an arithmetic unit, an individual memory connected to the arithmetic unit on a one-to-one basis, and a control unit configured to independently control turning on and off of operation of the arithmetic unit and the individual memory.

Abstract: A semiconductor integrated circuit including: N modules set in their functions in accordance with input function setting data, a circuit block having R number of I/O parts, and a module selection part for selecting R number of modules from among the N number of modules connecting the selected R number of modules and R number of I/O parts of the circuit block and connecting one module selected from among at least two modules to each of the R number of I/O parts. Each of the R number of I/O parts has a data holding part for holding a function setting data and inputting the held function setting data to the destination module, and N modules are able to replace functions of each other when the input function setting data are the same.

Abstract: Disclosed herein is a semiconductor chip including at least two processing apparatuses which comply with the same interface specifications and which differ in internal structure, wherein at least one of the processing apparatuses is constituted functionally to replace at least one processing apparatus.

Abstract: A shared memory device is disclosed which includes: a plurality of processor elements; a plurality of memory modules configured to be accessible by the plurality of processor elements; and a connection device configured to enable a specific processor element out of the plurality of processor elements to access a specific memory module out of the plurality of memory modules; wherein the plurality of processor elements are allowed to access via the connection device a plurality of memory systems each constituted by at least one memory module; and wherein each of the plurality of memory systems accessible by different processor elements allows the plurality of memory modules to be partially shared and accessed by the different processor elements.

Abstract: A circuit device includes plural semiconductor circuit devices that are formed on independent substrates, respectively, and communicate with each other. Each of the semiconductor circuit devices includes: plural modules of an identical type, functions of which are substitutable for one another; a module selecting unit that selects, among the plural modules, usable modules that are a part of the plural modules; and a circuit block including an interface unit for the modules selected by the module selecting unit to exchange signals with the other semiconductor circuit devices. A logic module included in one of the semiconductor circuit devices belongs to a different type, a function of which is not substitutable for a function of a logic module included in at least one of the other semiconductor circuit devices.

Abstract: A semiconductor integrated circuit having a plurality of interconnect layers and at least one via connecting interconnects of two adjacent interconnect layers, wherein each interconnect layer has a plurality of first interconnect groups and second interconnect groups arranged respectively in a row and a column in a matrix. The first and the second interconnect groups are alternately arranged in each row and in each column of the matrix arranged facing each other between two adjacent interconnect layers. The first and second interconnect groups facing each other between the layers have crossing parts where they can be connected through vias.

Abstract: A circuit device includes plural semiconductor circuit devices that are formed on independent substrates, respectively, and communicate with each other. Each of the semiconductor circuit devices includes: plural modules of an identical type, functions of which are substitutable for one another; a module selecting unit that selects, among the plural modules, usable modules that are a part of the plural modules; and a circuit block including an interface unit for the modules selected by the module selecting unit to exchange signals with the other semiconductor circuit devices. A logic module included in one of the semiconductor circuit devices belongs to a different type, a function of which is not substitutable for a function of a logic module included in at least one of the other semiconductor circuit devices.

Abstract: A semiconductor integrated circuit including: N modules set in their functions in accordance with input function setting data, a circuit block having R number of I/O parts, and a module selection part for selecting R number of modules from among the N number of modules connecting the selected R number of modules and R number of I/O parts of the circuit block and connecting one module selected from among at least two modules to each of the R number of I/O parts. Each of the R number of I/O parts has a data holding part for holding a function setting data and inputting the held function setting data to the destination module, and N modules are able to replace functions of each other when the input function setting data are the same.

Abstract: To improve the convenience of a user and further provide service comfortable and safe for the user. A PK 22 storing PMD as personal related information of a user 20 communicates with a service system 24. When first using the service system 24, the PK 22 stores the service ID of the service system 24 and a spoofing preventing method. When the PK 22 communicates with the service system 24 for a second time and thereafter, a spoofing preventing process is mutually performed, and then the PMD is provided to the service system 24. The service system 24 reads or changes the PMD on the basis of access permission information set in advance by the user 20. The present invention is applicable to PDAs.