Patents by Inventor Myung-Hee Kim

Myung-Hee Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110035051
    Abstract: Disclosed herein are a path planning apparatus and a method for a robot to plan an optimal path along which a manipulator of a robot moves to a goal point from a start point. An obstacle within a prescribed angle on a straight line connecting a start point and a goal point is recognized as a middle point in a configuration space and arbitrary points separated from the middle point by a prescribed distance are selected. Among the selected points, arbitrary points which can directly connect the start point and the goal point without passing the obstacle are selected as waypoints to map a new middle node. A path is extended via the middle node and extension of a tree in a wrong direction is minimized so that the manipulator is not struck at local minima without depending greatly on a goal score, thereby improving the performance of path planning and rapidly searching for a path.
    Type: Application
    Filed: August 3, 2010
    Publication date: February 10, 2011
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Myung Hee Kim, Kyung Shik Roh, San Lim, Bok Man Lim, Guo Chunxu
  • Publication number: 20110035050
    Abstract: If a manipulator of a robot falls in local minima when expanding a node to generate a path, the manipulator may efficiently escape from local minima by any one of a random escaping method and a goal function changing method or a combination thereof to generate the path. When the solution of inverse kinematics is not obtained due to local minima or when the solution of inverse kinematics is not obtained due to an inaccurate goal function, an optimal motion path to avoid an obstacle may be efficiently searched for. The speed to obtain the solution may be increased and thus the time consumed to search for the optimal motion path may be shortened.
    Type: Application
    Filed: July 21, 2010
    Publication date: February 10, 2011
    Applicant: SAMSUNG ELECTRONICS Co., LTD.
    Inventors: Myung Hee Kim, Kyung Shik Roh, San Lim, Bok Man Lim, Guochunxu
  • Publication number: 20110035087
    Abstract: A suitable waypoint is selected using a goal score, a section from a start point to a goal point through the waypoint is divided into a plurality of sections based on the waypoint with a solution of inverse kinematics, and trees are simultaneously expanded in the sections using a Best First Search & Rapidly Random Tree (BF-RRT) algorithm so as to generate a path. By this configuration, a probability of local minima occurring is decreased compared with the case where the waypoint is randomly selected. In addition, since the trees are simultaneously expanded in the sections each having the waypoint with a solution of inverse kinematics, the solution may be rapidly obtained. A time consumed to search for an optimal motion path may be shortened and path plan performance may be improved.
    Type: Application
    Filed: July 21, 2010
    Publication date: February 10, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myung Hee Kim, Kyung Shik Roh, San Lim, Bok Man Lim, Guochunxu
  • Publication number: 20110035053
    Abstract: Disclosed herein is a path planning apparatus and method of a robot, in which a path, along which the robot accesses an object to grasp the object, is planned. The path planning method includes judging whether or not a robot hand of a robot collides with an obstacle when the robot hand moves along one access path candidate selected from plural access path candidates along which the robot hand accesses an object to grasp the object, calculating an access score of the selected access path candidate when the robot hand does not collide with the obstacle, and determining an access path plan using the access score of the selected access path candidate.
    Type: Application
    Filed: July 21, 2010
    Publication date: February 10, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Guochunxu, Kyung Shik Roh, San Lim, Bok Man Lim, Myung Hee Kim
  • Patent number: 7867525
    Abstract: Disclosed are powders or extracts of plant leaves with anti-obesity effects and anti-obesity foods comprising them, and more particularly, anti-obesity food compositions comprising powders or extracts of one or more selected from group consisting of persimmon (Diospyros KakI Thunb.) leaves, buckwheat (Fagopyrum esculentum) leaves, Chinese matrimony vine (Lycium chinense) leaves, endive (Cichorium endivia) leaves, and ginseng (Panax ginseng). Also disclosed are compositions comprising plant extracts or powders to reduce the weight of animals or humans, and more particularly, boiling water extracts of persimmon leaves, buckwheat leaves and Chinese matrimony vine leaves and persimmon leaf powder, buckwheat leaf powder and Chinese matrimony vine leaf powder were prepared and administered to animals or humans to confirm the effects of reduction of their weight and then health foods comprising the extracts or powders are produced.
    Type: Grant
    Filed: August 14, 2003
    Date of Patent: January 11, 2011
    Assignee: Bionutrigen Co., Ltd.
    Inventors: Song-Hae Bok, Myung-Hee Kim, Eun-Eai Kim, Mung-Sook Choi, Surk-Sik Moon, Kyu-Tae Chang
  • Publication number: 20100200945
    Abstract: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.
    Type: Application
    Filed: April 19, 2010
    Publication date: August 12, 2010
    Inventors: Dae-Shik Kim, Oh-Kyum Kwon, Myung-Hee Kim, Yong-Chan Kim, Hye-Young Park, Joon-Suk Oh
  • Patent number: 7705409
    Abstract: Some embodiments of the present invention provide high voltage transistors including a semiconductor substrate and a device isolation film defining an active region in the semiconductor substrate. A gate electrode extends along a central portion of the active region while maintaining a predetermined width on the semiconductor substrate. A second well is formed on both sides of the gate electrode in the semiconductor substrate, and partially extends to a bottom surface of the device isolation film. The active region in the semiconductor substrate comprises a first active region disposed under the gate electrode, and separating the device isolation film and a second active region defined by the first active region and the device isolation film. Methods of manufacturing high voltage transistors are also provided.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: April 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Oh-kyum Kwon, Yong-chan Kim, Joon-suk Oh, Myung-hee Kim, Hye-young Park
  • Publication number: 20080185664
    Abstract: Some embodiments of the present invention provide high voltage transistors including a semiconductor substrate and a device isolation film defining an active region in the semiconductor substrate. A gate electrode extends along a central portion of the active region while maintaining a predetermined width on the semiconductor substrate. A second well is formed on both sides of the gate electrode in the semiconductor substrate, and partially extends to a bottom surface of the device isolation film. The active region in the semiconductor substrate comprises a first active region disposed under the gate electrode, and separating the device isolation film and a second active region defined by the first active region and the device isolation film. Methods of manufacturing high voltage transistors are also provided.
    Type: Application
    Filed: January 15, 2008
    Publication date: August 7, 2008
    Inventors: Oh-kyum Kwon, Yong-chan Kim, Joon-suk Oh, Myung-hee Kim, Hye-young Park
  • Publication number: 20080006899
    Abstract: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may, be formed under a portion of the schottky junction.
    Type: Application
    Filed: May 4, 2007
    Publication date: January 10, 2008
    Inventors: Dae-Shik Kim, Oh-Kyum Kwon, Myung-Hee Kim, Yong-Chan Kim, Hye-Young Park, Joon-Suk Oh
  • Publication number: 20070145467
    Abstract: An EEPROM includes a semiconductor substrate and a device isolation region defining first, second and third active regions in the semiconductor substrate. The EEPROM also includes at least one first insulation region in at least one first trench in the first active region. A floating gate insulation layer is disposed on the at least one first insulation region and the first, second and third active regions and a floating gate conduction layer is disposed on the floating gate insulation layer. Impurity-containing regions may be disposed in each of the first, second and third active regions at respective sides of the floating gate conduction layer. The floating gate insulation layer may include at least one thinned portion proximate the at least one first insulation region, which may aid Fowler-Nordheim tunneling at this site.
    Type: Application
    Filed: October 3, 2006
    Publication date: June 28, 2007
    Inventors: Geun-sook Park, Byung-sun Kim, Sang-bae Yi, Ho-ik Hwang, Myung-hee Kim, Hye-young Park
  • Publication number: 20070148851
    Abstract: A method of programming an EEPROM including a first active region, a second active region and a third active region located separately in a semiconductor substrate, a common floating gate above and intersecting the active regions, first impurity regions located at both sides of the common floating gate in the first active region, second impurity regions located at both sides of the common floating gate in the second active regions and third impurity region, located at both sides of the common floating gate in the third active region. The method includes: applying a programming voltage to the first impurity regions in the first active region and the third impurity regions in the third active region; and applying a ground voltage to the second impurity regions in the second active region.
    Type: Application
    Filed: December 8, 2006
    Publication date: June 28, 2007
    Inventors: Myung-hee Kim, Geun-sook Park, Sang-bae Yi, Ho-ik Hwang, Hye-young Park
  • Publication number: 20050003026
    Abstract: The present invention is related to powder or extracts of plant leaves with anti-obesity effects and anti-obesity food comprising them and more particularly, anti-obesity food compositions comprising powder or extracts of one or more selected from group consisting of persimmon leaves, buckwheat leaves, Chinese matrimony vine leaves, endive leaves, and a ginseng.
    Type: Application
    Filed: August 14, 2003
    Publication date: January 6, 2005
    Inventors: Song-Hae Bok, Myung-Hee Kim, Eun-Eai Kim, Mung-Sook Choi, Surk-Sik Moon, Kyu-Tae Chang
  • Patent number: 6723680
    Abstract: The present invention relates to a regulation composition for gametophytic self-incompatibility which contains sulfates especially CuSO4 and ZnSO4 as an inhibitor, which prevents a style-specific RNase activity regulating gametophytic self-incompatibility; a control method for gametophytic self-incompatibility of a plant by using the regulation composition for gametophytic self-incompatibility; and a plant self-pollinated by destroying the gametophytic self-incompatibility, using the control method. By using the regulation composition for gametophytic self-incompatibility according to the present invention, a single species of fruit trees can be self-pollinated without cultivating other pollinizer, so that fruition rate can be increased and the productivity per unit area can be maximized.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: April 20, 2004
    Assignee: Istech Co., Ltd.
    Inventors: Il-Kyung Chung, Jong-Sang Ryu, Myung-Hee Kim, Byung-Ju Heo, Il-Sun Chung
  • Publication number: 20030064894
    Abstract: The present invention relates to a regulation composition for gametophytic self-incompatibility which contains sulfates especially CuSO4 and ZnSO4 as an inhibitor, which prevents a style-specific RNase activity regulating gametophytic self-incompatibility; a control method for gametophytic self-incompatibility of a plant by using the regulation composition for gametophytic self-incompatibility; and a plant self-pollinated by destroying the gametophytic self-incompatibility, using the control method.
    Type: Application
    Filed: February 12, 2002
    Publication date: April 3, 2003
    Inventors: Ii-Kyung Chung, Jong-Sang Ryu, Myung-Hee Kim, Byung-Ju Heo, Il-Sun Chung