Abstract: A parallel bit counter for counting the number of bits having a particular level in parallel input data. The counter includes a 2-bit sorter adapted to sort "high" and "low" bit fields of parallel input data in accordance with a bit sort method, and a caster adapted to detect a boundary between the sorted "high" and "low" bit fields and to code the resultant signal obtained after the detection, indicative of the number of "high" bits included in the input data, into its equivalent binary form. Accordingly, the counter can prevent a degradation in the counting speed resulting from a multiple adder operation and a carry set-up time.

Abstract: An internal voltage generator for a semiconductor device. Whereas a feedback signal is given to maintain a voltage of a predetermined level by a voltage detector in the conventional art, the internal voltage generator adopts a method of adjusting the period. Therefore, the variance of a signal generated due to a time delay can be reduced. The internal voltage generator includes an oscillator for generating pulses of a predetermined period when a power-up signal is activated, a timing generator for generating appropriate timing according to the output of the oscillator for determining the basic operational period of a voltage pump and a series of signals, a pump driver for controlling a voltage pump to operate with a predetermined phase by controlling a pulse signal from the oscillator by the pulse signal of a predetermined period generated from the timing generator, and a voltage pump for pumping voltage to a third voltage and outputting the same.