Abstract: A complementary metal oxide silicon transceiver having an integrated power amplifier is provided. The complementary metal oxide silicon transceiver having the integrated power amplifier is capable of controlling an output power according to a communication environment to solve the following problem that with the increment of an output level of a power amplifier, performance is decreased when noises flow into other blocks of a transceiver with power and thus are inputted to the power amplifier.

Abstract: An adaptive power amplifier and a radio frequency transmitter thereof are described. The radio frequency transmitter is a transmitter to transmit a transmission signal for a wireless communication system. The radio frequency transmitter includes at least one direct-current (DC) to direct-current (DC) converter coupled to an external power supply device for operation, a digital-to-analog converter configured to convert a digital signal into an analog signal, a filter configured to filter a harmonic component of the analog signal to generate an input signal, a RF up-converter configured to up-convert the input signal according to a desired channel frequency for generating a modulated signal, and a power amplifying circuit coupled to the DC-to-DC converter and the external power supply device, for selectively receiving one of different supply voltages for operation, and amplifying the modulated signal to generate a RF output signal.

Abstract: A complementary metal oxide silicon transceiver having an integrated power amplifier is provided. The complementary metal oxide silicon transceiver having the integrated power amplifier is capable of controlling an output power according to a communication environment to solve the following problem that with the increment of an output level of a power amplifier, performance is decreased when noises flow into other blocks of a transceiver with power and thus are inputted to the power amplifier.

Abstract: A dual operation mode power amplifier is disclosed. In the power amplifier in accordance with an embodiment of the present invention, a bias circuit part can be converted to decrease power consumption. Different from the prior art, performance of the present invention is not reduced in a high power mode, and no additional passive components like inductors or transformers with a large area are necessary to be further added. Furthermore, a tunable impedance matching circuit provides impedances respectively matching impedances of a fully differential amplifier and a single-ended amplifier, thereby improving the performance of the power amplifier.

Abstract: An inductor-less low noise amplifier (LNA) with high linearity is disclosed. The low noise amplifier includes: an input signal stage receiving an input signal; a first amplifier configured to receive the input signal, generate a first amplification signal by amplifying the received input signal, and output the generated first amplification signal, as a first output signal, to a first output terminal; a second amplifier configured to receive the input signal, generate a second amplification signal by amplifying the received input signal, and output the generated second amplification signal, as a second output signal, to a second output terminal; an output signal stage outputting a superimposition signal obtained by superimposing the first output signal and the second output signal; a first resistor feeding back the superimposition signal to the input signal stage; and a switch connecting/disconnecting between the input signal stage and the output signal stage.

Abstract: An adaptive power amplifier and a radio frequency transmitter thereof are described. The radio frequency transmitter is a transmitter to transmit a transmission signal for a wireless communication system. The radio frequency transmitter includes at least one direct-current (DC) to direct-current (DC) converter coupled to an external power supply device for operation, a digital-to-analog converter configured to convert a digital signal into an analog signal, a filter configured to filter a harmonic component of the analog signal to generate an input signal, a RF up-converter configured to up-convert the input signal according to a desired channel frequency for generating a modulated signal, and a power amplifying circuit coupled to the DC-to-DC converter and the external power supply device, for selectively receiving one of different supply voltages for operation, and amplifying the modulated signal to generate a RF output signal.

Abstract: An inductor-less low noise amplifier (LNA) with high linearity is disclosed. The low noise amplifier includes: an input signal stage receiving an input signal; a first amplifier configured to receive the input signal, generate a first amplification signal by amplifying the received input signal, and output the generated first amplification signal, as a first output signal, to a first output terminal; a second amplifier configured to receive the input signal, generate a second amplification signal by amplifying the received input signal, and output the generated second amplification signal, as a second output signal, to a second output terminal; an output signal stage outputting a superimposition signal obtained by superimposing the first output signal and the second output signal; a first resistor feeding back the superimposition signal to the input signal stage; and a switch connecting/disconnecting between the input signal stage and the output signal stage.

Abstract: The present invention discloses a low-noise amplifier having a characteristic of high linearity for multi-band. Embodiments of the present invention is to provide a low-noise amplifier (LNA), which realizes a balun function and a preamplifier function of mixer in the low-noise amplifier (LNA), and minimizes the factors reducing the linearity between the low-noise amplifier (LNA) and the mixer.

Abstract: A dual operation mode power amplifier is disclosed. In the power amplifier in accordance with an embodiment of the present invention, a bias circuit part can be converted to decrease power consumption. Different from the prior art, performance of the present invention is not reduced in a high power mode, and no additional passive components like inductors or transformers with a large area are necessary to be further added. Furthermore, a tunable impedance matching circuit provides impedances respectively matching impedances of a fully differential amplifier and a single-ended amplifier, thereby improving the performance of the power amplifier.

Abstract: An apparatus for receiving signals in a radio frequency system includes a low noise amplifier that amplifies and filters a signal received from an antenna; a first frequency mixer that mixes the signal output from the low noise amplifier and an oscillation signal supplied from a local oscillator to create a signal of an intermediate frequency; a second frequency mixer that mixes the signal of an intermediate frequency and one or more oscillation signals that have an offset added to have different frequency channels, which have a predetermined bandwidth, to create one or more signals of a baseband frequency; a channel selection filter that divides one or more signals generated in the second frequency mixer into one or more different frequency channels having a predetermined bandwidth using the offset; and an amplifier that amplifies the signals that have been filtered in the channel selection filter.

Abstract: The present invention discloses a low-noise amplifier having a characteristic of high linearity for multi-band. Embodiments of the present invention is to provide a low-noise amplifier (LNA), which realizes a balun function and a preamplifier function of mixer in the low-noise amplifier (LNA), and minimizes the factors reducing the linearity between the low-noise amplifier (LNA) and the mixer.

Abstract: Disclosed are an apparatus for lock detection suitable for a fractional-N frequency synthesizer and a method thereof. The lock detector for use in the fractional-N frequency synthesizer includes a delay unit delaying an N-divider output frequency clock based on an output value of a fraction ratio modulator, a lock detection unit outputting a lock detection signal by comparing a reference frequency clock with the N-divider output frequency clock delayed by the delay unit, a counter counting the number of lock detection signals received from the lock detection unit, and a controller issuing a command to output a lock identification signal based on the number of lock detection signals counted by the counter.

Abstract: Disclosed are an apparatus for lock detection suitable for a fractional-N frequency synthesizer and a method thereof. The lock detector for use in the fractional-N frequency synthesizer includes a delay unit delaying an N-divider output frequency clock based on an output value of a fraction ratio modulator, a lock detection unit outputting a lock detection signal by comparing a reference frequency clock with the N-divider output frequency clock delayed by the delay unit, a counter counting the number of lock detection signals received from the lock detection unit, and a controller issuing a command to output a lock identification signal based on the number of lock detection signals counted by the counter.

Abstract: An apparatus for receiving signals in a radio frequency system includes a low noise amplifier that amplifies and filters a signal received from an antenna; a first frequency mixer that mixes the signal output from the low noise amplifier and an oscillation signal supplied from a local oscillator to create a signal of an intermediate frequency; a second frequency mixer that mixes the signal of an intermediate frequency and one or more oscillation signals that have an offset added to have different frequency channels, which have a predetermined bandwidth, to create one or more signals of a baseband frequency; a channel selection filter that divides one or more signals generated in the second frequency mixer into one or more different frequency channels having a predetermined bandwidth using the offset; and an amplifier that amplifies the signals that have been filtered in the channel selection filter.

Abstract: The present invention relates to a direct current (DC) offset suppression circuit to suppress DC offsets occurring when a communication circuit where a complex filter is adopted performs self-mixing. The DC offset is suppressed by a DC feedback circuit adopted by a filter which is substituted for a complex filter in the communication circuit. But, the DC offset cannot be suppressed when a complex filter is used in the communication circuit. It is because phase changes of the complex filter cause output signal fed back to the input of the complex filter to generate phase differences. The present invention includes a phase compensation unit and a DC feedback unit. The phase compensation unit compensates a change in frequency between input and output of the complex filter for phase compensation. The DC feedback unit inverses and feeds back the compensated phase to an input of the complex filter.

Abstract: A low noise reference voltage circuit without using an amplifier inside is capable of transforming a current IPTAT in positive proportion to absolute temperature into a voltage VPTAT in positive proportion to absolute temperature, and outputting it to a ring oscillator. The low noise reference voltage circuit improves a degradation of noise performance compared with a conventional band-gap reference voltage circuit and is in characteristic of low noise and higher PSRR.

Abstract: The present invention provides a receiver with low power consumption. The receiver with low power consumption adjusts the gain of the programmable gain amplifier based on the automatic gain controller and further optimizes the gain bandwidth product by current-adjusting unit. The current-adjusting unit thus adjusts the current provided for the programmable gain amplifier, e.g. operational amplifier. Therefore, the gain bandwidth product of the programmable gain amplifier is optimized and the power consumption of the receiver is effectively decreased.

Abstract: The present invention provides a receiver having low power consumption and method thereof. The receiver with low power consumption adjusts the gain based on the automatic gain control information. The receiver acquires the signal peaks both after and before a channel selection filter and further analyzes the wanted signal and interference signal with respect to the signal peaks. The receiver determines the magnitude of the wanted signal and determines whether the interference signal exists. The receiver provides the signals with optimal current correspondingly in order to effectively decrease the power consumption of the receiver.

Abstract: The present invention relates to a direct current (DC) offset suppression circuit to suppress DC offsets occurring when a communication circuit where a complex filter is adopted performs self-mixing. The DC offset is suppressed by a DC feedback circuit adopted by a filter which is substituted for a complex filter in the communication circuit. But, the DC offset cannot be suppressed when a complex filter is used in the communication circuit. It is because phase changes of the complex filter cause output signal fed back to the input of the complex filter to generate phase differences. The present invention includes a phase compensation unit and a DC feedback unit. The phase compensation unit compensates a change in frequency between input and output of the complex filter for phase compensation. The DC feedback unit inverses and feeds back the compensated phase to an input of the complex filter.

Abstract: The present invention discloses a mixer circuit for mixing two input signals by source-coupled MOS transistors and outputting a mixed result. A duty cycle controlling MOS transistor is connected to a source of each source-coupled MOS transistor in series. A duty cycle controlling pulse is applied to a gate of the duty cycle controlling MOS transistor. The duty cycle controlling pulse has a phase shift of ?90 degrees with respect to a controlling pulse applied to the gate of the source-coupled MOS transistor connected with the duty cycle controlling MOS transistor in series. An AND-combination of the duty cycles of the two controlling pulses applied to the gates of the two MOS transistors connected in series can be controlled at 25%. Comparing to the conventional mixer circuit having a switch control duty cycle of 50%, the present invention achieves the effects of increasing the gain and reducing the noise figure.