Patents by Inventor Myung Yoo
Myung Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240178293Abstract: Disclosed is a semiconductor device comprising a substrate including an active pattern, a channel pattern on the active pattern and including semiconductor patterns spaced apart from and vertically stacked on each other, a source/drain pattern connected to the semiconductor patterns having a p-type, a gate electrode on the semiconductor patterns and including inner electrodes between neighboring semiconductor patterns and an outer electrode on an uppermost semiconductor pattern, and a gate dielectric layer between the gate electrode and the semiconductor patterns and including an inner gate dielectric layer adjacent to the inner electrode and an outer gate dielectric layer that extends from bottom to lateral surfaces of the outer electrode. The outer electrode and the outer gate dielectric layer have an inverted T shape.Type: ApplicationFiled: August 1, 2023Publication date: May 30, 2024Inventors: Hyumin YOO, Beomjin PARK, Myung Gil KANG, Dongwon KIM, Younggwon KIM
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Publication number: 20240132782Abstract: A waste wood sleeper pyrolysis apparatus of a hybrid heating type includes a plurality of reactor containers arranged side by side, each having a space in which a waste wood sleeper is placed, a movement rail arranged parallel to an end of one side and an end of the other side of each of the plurality of reactor containers, and a microwave applicator coupled to the movement rail and including a plurality of microwave generators that move to upper portions of the plurality of reactor containers to transmit microwaves into the plurality of reactor containers.Type: ApplicationFiled: October 15, 2023Publication date: April 25, 2024Inventors: Tae Hoon KOH, Myung SAGONG, Jae Young LEE, Dong Geun LEE, Hanju YOO
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Publication number: 20240079466Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern on the active pattern, the channel pattern including a plurality of semiconductor patterns spaced apart from each other, a source/drain pattern connected to the plurality of semiconductor patterns, a gate electrode including, an inner electrode between a first semiconductor pattern of the plurality of semiconductor patterns and a second semiconductor pattern of the plurality of semiconductor patterns, the first semiconductor pattern and the second semiconductor pattern being adjacent to each other, and an outer electrode on an uppermost semiconductor pattern of the plurality of semiconductor patterns.Type: ApplicationFiled: April 20, 2023Publication date: March 7, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sangwon Baek, Beomjin Park, Myung Gil Kang, Dongwon Kim, Hyumin Yoo, Namkyu Cho
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Patent number: 11920856Abstract: A refrigerator includes a storage chamber having an opening; a drawer type door to open or close the opening; a display positioned at the drawer type door; a first connector provided at a sidewall of the storage chamber; a second connector provided at the drawer type door and being electrically connected to the display; a first frame coupled to an inner wall of the storage chamber, the first frame to cover the first connector; a second frame coupled to the drawer type door, the second frame to support a storage box; and a wire electrically connected between the first connector and the second connector. The first frame has a first accommodating part to accommodate one portion of the wire and the second frame has a second accommodating part to accommodate another portion of the wire.Type: GrantFiled: October 13, 2020Date of Patent: March 5, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae Myung Han, Jae Hoon Lim, Gi Joong Jeong, Woo Yeol Yoo, Jong Eun Chae, Sun keun Lee
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Publication number: 20210149308Abstract: The present disclosure generally relates to a method and apparatus for loading, processing, and unloading substrates. A processing system comprises a load/unload system coupled to a photolithography system. The load/unload system comprises a first set of tracks having a first height and a first width, and a second set of tracks having a second height and a second width different than the first height and first width. An unprocessed substrate is transferred from a lift pin loader to a chuck along the first set of tracks on a first tray while a processed substrate is transferred from the chuck to the lift pin loader along the second set of tracks on a second tray. While a first tray remains with a substrate on the chuck during processing, the load/unload system is configured to unload a processed substrate and load an unprocessed substrate on a second tray.Type: ApplicationFiled: January 25, 2021Publication date: May 20, 2021Inventors: Benjamin M. JOHNSTON, Preston FUNG, Sean SCREWS, Cheuk Ming LEE, Jae Myung YOO
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Patent number: 11009801Abstract: Embodiments described herein provide a system, a software application, and methods of a lithography process that provide at least one of the ability to decrease the stabilization time and write an exposure pattern into a photoresist on a substrate compensating for the change in the total pitch over a stabilization time. One embodiment of the system includes a slab, a stage disposed over the slab, a pair of supports disposed on the slab, a processing apparatus, and a chiller system. The pair of supports support a pair of tracks and the stage is configured to move along the pair of tracks. The processing apparatus has an apparatus support coupled to the slab and a processing unit supported by the apparatus support. The processing unit has a plurality of image projection systems. The chiller system has at least one fluid channel disposed in each track of the pair of tracks.Type: GrantFiled: September 28, 2020Date of Patent: May 18, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Benjamin M. Johnston, David Michael Corriveau, Cheuk Ming Lee, Jae Myung Yoo, WeiMin Tao, Antoine P. Manens
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Patent number: 10901328Abstract: The present disclosure generally relates to a method and apparatus for loading, processing, and unloading substrates. A processing system comprises a load/unload system coupled to a photolithography system. The load/unload system comprises a first set of tracks having a first height and a first width, and a second set of tracks having a second height and a second width different than the first height and first width. An unprocessed substrate is transferred from a lift pin loader to a chuck along the first set of tracks on a first tray while a processed substrate is transferred from the chuck to the lift pin loader along the second set of tracks on a second tray. While a first tray remains with a substrate on the chuck during processing, the load/unload system is configured to unload a processed substrate and load an unprocessed substrate on a second tray.Type: GrantFiled: September 28, 2018Date of Patent: January 26, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Benjamin M. Johnston, Preston Fung, Sean Screws, Cheuk Ming Lee, Jae Myung Yoo
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Publication number: 20210011390Abstract: Embodiments described herein provide a system, a software application, and methods of a lithography process that provide at least one of the ability to decrease the stabilization time and write an exposure pattern into a photoresist on a substrate compensating for the change in the total pitch over a stabilization time. One embodiment of the system includes a slab, a stage disposed over the slab, a pair of supports disposed on the slab, a processing apparatus, and a chiller system. The pair of supports support a pair of tracks and the stage is configured to move along the pair of tracks. The processing apparatus has an apparatus support coupled to the slab and a processing unit supported by the apparatus support. The processing unit has a plurality of image projection systems. The chiller system has at least one fluid channel disposed in each track of the pair of tracks.Type: ApplicationFiled: September 28, 2020Publication date: January 14, 2021Inventors: Benjamin M. JOHNSTON, David Michael CORRIVEAU, Cheuk Ming LEE, Jae Myung YOO, WeiMin TAO, Antoine P. MANENS
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Patent number: 10788762Abstract: Embodiments described herein provide a system, a software application, and methods of a lithography process that provide at least one of the ability to decrease the stabilization time and write an exposure pattern into a photoresist on a substrate compensating for the change in the total pitch over a stabilization time. One embodiment of the system includes a slab, a stage disposed over the slab, a pair of supports disposed on the slab, a processing apparatus, and a chiller system. The pair of supports support a pair of tracks and the stage is configured to move along the pair of tracks. The processing apparatus has an apparatus support coupled to the slab and a processing unit supported by the apparatus support. The processing unit has a plurality of image projection systems. The chiller system has at least one fluid channel disposed in each track of the pair of tracks.Type: GrantFiled: February 25, 2019Date of Patent: September 29, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Benjamin M. Johnston, David Michael Corriveau, Cheuk Ming Lee, Jae Myung Yoo, WeiMin Tao, Antoine P. Manens
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Publication number: 20200272063Abstract: Embodiments described herein provide a system, a software application, and methods of a lithography process that provide at least one of the ability to decrease the stabilization time and write an exposure pattern into a photoresist on a substrate compensating for the change in the total pitch over a stabilization time. One embodiment of the system includes a slab, a stage disposed over the slab, a pair of supports disposed on the slab, a processing apparatus, and a chiller system. The pair of supports support a pair of tracks and the stage is configured to move along the pair of tracks. The processing apparatus has an apparatus support coupled to the slab and a processing unit supported by the apparatus support. The processing unit has a plurality of image projection systems. The chiller system has at least one fluid channel disposed in each track of the pair of tracks.Type: ApplicationFiled: February 25, 2019Publication date: August 27, 2020Inventors: Benjamin M. JOHNSTON, David Michael CORRIVEAU, Cheuk Ming LEE, Jae Myung YOO, WeiMin TAO, Antoine P. MANENS
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Publication number: 20200103760Abstract: The present disclosure generally relates to a method and apparatus for loading, processing, and unloading substrates. A processing system comprises a load/unload system coupled to a photolithography system. The load/unload system comprises a first set of tracks having a first height and a first width, and a second set of tracks having a second height and a second width different than the first height and first width. An unprocessed substrate is transferred from a lift pin loader to a chuck along the first set of tracks on a first tray while a processed substrate is transferred from the chuck to the lift pin loader along the second set of tracks on a second tray. While a first tray remains with a substrate on the chuck during processing, the load/unload system is configured to unload a processed substrate and load an unprocessed substrate on a second tray.Type: ApplicationFiled: September 28, 2018Publication date: April 2, 2020Inventors: Benjamin M. JOHNSTON, Preston FUNG, Sean SCREWS, Cheuk Ming LEE, Jae Myung YOO
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Publication number: 20200011652Abstract: Processing systems and methods used in the manufacturing of flat panel displays (FPDs) are provided herein. In one embodiment, a processing system features a motion stage movably disposed on a base surface, one or more X-position interferometers, and a plurality of Y-position interferometers. The X-position interferometers include an X-position mirror fixedly coupled to the motion stage and an X-axis stationary module fixedly coupled a non-moving surface of processing system. Each of the plurality of Y-position interferometers include one of a first or second Y-position mirror fixedly coupled to the motion stage in orthogonal relationship to the one or more X-position mirrors and one of a first or a second Y-axis stationary module fixedly coupled to a non-moving surface of the processing system. Here, each of the Y-axis stationary modules is positioned to direct coherent radiation towards a respective Y-position mirror when the Y-position interferometer thereof is in an active arrangement.Type: ApplicationFiled: July 3, 2018Publication date: January 9, 2020Inventors: Benjamin M. JOHNSTON, Cheuk Ming LEE, Jae Myung YOO, Glen Alan GOMES, David Michael CORRIVEAU, Thang Duc NGUYEN
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Patent number: 10357528Abstract: The present invention relates to a pharmaceutical composition for preventing and treating corneal diseases or conjunctival diseases, containing a maple leaf extract as an active ingredient. The maple leaf extract exhibits an effect of inhibiting hyperemia in the eyeball in which hyperemia has been induced and an effect of inhibiting angiogenesis in the eyeball in which corneal damage has been induced, thus being effectively used in a pharmaceutical composition for preventing and treating corneal diseases or conjunctival diseases.Type: GrantFiled: July 8, 2016Date of Patent: July 23, 2019Assignee: KOREA INSTITUTE OF ORIENTAL MEDICINEInventors: Jin Yeul Ma, Jung Hyun Kim, Jong Wook Jeon, You Chang Oh, Won Kyung Cho, Youn Hwan Hwang, Nam Hui Yim, Jae Myung Yoo
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Publication number: 20180264064Abstract: The present invention relates to a pharmaceutical composition for preventing and treating corneal diseases or conjunctival diseases, containing a maple leaf extract as an active ingredient. The maple leaf extract exhibits an effect of inhibiting hyperemia in the eyeball in which hyperemia has been induced and an effect of inhibiting angiogenesis in the eyeball in which corneal damage has been induced, thus being effectively used in a pharmaceutical composition for preventing and treating corneal diseases or conjunctival diseases.Type: ApplicationFiled: July 8, 2016Publication date: September 20, 2018Inventors: Jin Yeul MA, Jung Hyun KIM, Jong Wook JEON, You Chang OH, Won Kyung CHO, Youn Hwan HWANG, Nam Hui YIM, Jae Myung YOO
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Publication number: 20080254561Abstract: A method of fabricating a vertical structure opto-electronic device includes fabricating a plurality of vertical structure opto-electronic devices on a crystal substrate, and then removing the substrate using a laser lift-off process. The method then fabricates a metal support structure in place of the substrate. In one aspects the step of fabricating a metal support structure in place of the substrate includes the step of plating the metal support structure using at least one of electroplating and electro-less plating. In one aspect, the vertical structure is a GaN-based vertical structure, the crystal substrate includes sapphire and the metal support structure includes copper. Advantages of the invention include fabricating vertical structure LEDs suitable for mass production with high reliability and high yield.Type: ApplicationFiled: March 2, 2006Publication date: October 16, 2008Inventor: Myung Yoo
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Publication number: 20080064132Abstract: A vertical topology device includes a conductive adhesion structure having a first surface and a second surface, a conductive thick film support formed on the first surface, and a semiconductive device having an upper electrical contact and located over the conductive adhesion layer. Electrical current can flow between the conductive thick film and the upper electrical contact.Type: ApplicationFiled: August 2, 2007Publication date: March 13, 2008Inventor: Myung Yoo
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Publication number: 20080001166Abstract: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.Type: ApplicationFiled: September 5, 2007Publication date: January 3, 2008Inventors: Jong-Lam Lee, In-Kwon Jeong, Myung Yoo
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Publication number: 20070295986Abstract: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.Type: ApplicationFiled: August 30, 2007Publication date: December 27, 2007Inventors: Jong-Lam Lee, In-Kwon Jeong, Myung Yoo
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Publication number: 20070172973Abstract: A method of forming a light emitting diode includes forming a transparent substrate and a GaN buffer layer on the transparent substrate. An n-GaN layer is formed on the buffer layer. An active layer is formed on the n-GaN layer. A p-GaN layer is formed on the active layer. A p-electrode is formed on the p-GaN layer and an n-electrode is formed on the n-GaN layer. A reflective layer is formed on a second side of the transparent substrate. A scribe line is formed on the substrate for separating the diodes on the substrate. Also, a cladding layer of AlGaN is between the p-GaN layer and the active layer.Type: ApplicationFiled: March 2, 2007Publication date: July 26, 2007Inventor: Myung Yoo
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Publication number: 20070151071Abstract: A vacuum cleaner includes both a main dust separation unit and a secondary dust separation unit. One of the dust separation units is provided on a main body of the vacuum cleaner, and the other dust separation unit is provided on a removable dust collection unit that is mountable on the main body.Type: ApplicationFiled: March 2, 2007Publication date: July 5, 2007Inventors: Young Son, Hae Yang, Kyeong Jeong, Myung Yoo, Min Park, Sung Lee, Moo Ko, Kie Hyun, Jong Choo, Il Kim, Jin Shin