Patents by Inventor Myung-Yoon Um
Myung-Yoon Um has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230352591Abstract: A semiconductor device includes an isolation structure having first and second sidewalls opposite each other, a first fin-shaped pattern in contact with the first sidewall and extending in the second direction, a second fin-shaped pattern in contact with the second sidewall and extending in the second direction, a first gate electrode on the first fin-shaped pattern, a first source/drain contact on the first and second fin-shaped patterns and extending between the first gate electrode and the element isolation structure, and a wiring structure on and connected to the first source/drain contact, wherein the first source/drain contact includes a lower contact intersecting the first and second fin-shaped patterns, an upper contact protruding from the lower contact, and a dummy contact, the wiring structure being in contact with the upper contact and not with the dummy contact.Type: ApplicationFiled: November 18, 2022Publication date: November 2, 2023Inventors: Deok Han BAE, Myung Yoon UM, Yu Ri LEE, Sun Me LIM, Jun Su JEON
-
Patent number: 11705497Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first direction on the substrate, a gate electrode extending in a second direction intersecting the first direction on the active pattern, a gate spacer extending in the second direction along side walls of the gate electrode, an interlayer insulating layer contacting side walls of the gate spacer, a trench formed on the gate electrode in the interlayer insulating layer, a first capping pattern provided along side walls of the trench, at least one side wall of the first capping pattern having an inclined profile, and a second capping pattern provided on the first capping pattern in the trench.Type: GrantFiled: February 25, 2021Date of Patent: July 18, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: In Yeal Lee, Yoon Young Jung, Jin-Wook Kim, Deok Han Bae, Myung Yoon Um
-
Patent number: 11626501Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, and a gate contact in the gate structure. The gate structure includes a gate electrode extending in a first direction and a gate capping pattern on the gate electrode. The gate contact is connected to the gate electrode. The gate electrode includes a protrusion extending along a boundary between the gate contact and the gate capping pattern.Type: GrantFiled: September 30, 2020Date of Patent: April 11, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: In Yeal Lee, Ju Youn Kim, Jin-Wook Kim, Ju Hun Park, Deok Han Bae, Myung Yoon Um
-
Patent number: 11600711Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes an active fin protruding upwardly from a substrate and extending in a first direction and a gate structure extending in a second direction intersecting to cross the active fin, where a first width of a lower portion of the gate structure that contacts the active fin is greater than a second width of the lower portion of the gate structure that is spaced apart from the active fin.Type: GrantFiled: May 25, 2021Date of Patent: March 7, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Gun You, Myung-Yoon Um, Young-Joon Park, Jeong-Hyo Lee, Ji-Yong Ha, Jun-sun Hwang
-
Patent number: 11575014Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising an element isolation region and an active region defined by the element isolation region, a fin-type pattern on the active region, the fin-type pattern extending in a first horizontal direction, a gate electrode on the fin-type pattern, the gate electrode extending in a second horizontal direction that crosses the first horizontal direction, a capping pattern on the gate electrode, a source/drain region on at least one side of the gate electrode, a source/drain contact on the source/drain region and electrically connected to the source/drain region, and a filling insulating layer on the source/drain contact, the filling insulating layer having a top surface at a same level as a top surface of the capping pattern, and including a material containing a carbon (C) atom.Type: GrantFiled: April 12, 2021Date of Patent: February 7, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Deok Han Bae, Sung Min Kim, Ju Hun Park, Myung Yoon Um, Jong Mil Youn
-
Patent number: 11521900Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.Type: GrantFiled: December 28, 2020Date of Patent: December 6, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Gi Gwan Park, Jung Gun You, Ki Il Kim, Sug Hyun Sung, Myung Yoon Um
-
Publication number: 20220336664Abstract: A semiconductor device is capable of improving the performance and reliability of a device. The semiconductor device includes a first fin-shaped pattern which extends lengthwise in a first direction, a second fin-shaped pattern which is spaced apart from the first fin-shaped pattern in a second direction and extends lengthwise in the first direction, a first gate electrode extending lengthwise in the second direction on the first fin-shaped pattern, a second gate electrode extending lengthwise in the second direction on the second fin-shaped pattern, a first gate separation structure which separates the first gate electrode and the second gate electrode and is at the same vertical level as the first gate electrode and the second gate electrode, and a first source/drain contact extending lengthwise in the second direction on the first fin-shaped pattern and the second fin-shaped pattern.Type: ApplicationFiled: December 22, 2021Publication date: October 20, 2022Inventors: Deok Han BAE, Ju Hun PARK, Myung Yoon UM, Yu Ri LEE, In Yeal LEE
-
Publication number: 20220320301Abstract: A semiconductor device including a field insulating layer, a part of which protrudes upwardly in a vertical direction on an element isolation region between a first active region and a second active region may be provided. Accordingly, a depth of a source/drain contact to be provided may be reduced, thereby reducing difficulty for providing the source/drain contact may be reduced.Type: ApplicationFiled: December 1, 2021Publication date: October 6, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Deok Han BAE, Ju Hun PARK, Myung Yoon UM
-
Publication number: 20220262797Abstract: A semiconductor device includes a substrate having a first power supply region, a second power supply region, and a cell region therein. The cell region extends between the first power supply region and the second power supply region. A first active region and a second active region are provided, which extend side-by-side within the cell region. A first power supply wiring is provided, which extends in the first direction within the first power supply region. A first source/drain contact is provided, which connects the first active region and the second active region. A second source/drain contact is provided, which connects the first active region and the first power supply wiring. The first source/drain contact includes a first recess portion disposed inside an intermediate region between the first active region and the second active region.Type: ApplicationFiled: October 27, 2021Publication date: August 18, 2022Inventors: Deok Han Bae, Ju Hun Park, Myung Yoon Um, Ye Ji Lee, Yoon Young Jung
-
Publication number: 20220254881Abstract: A semiconductor device includes an active pattern extending in a first direction on a substrate, a gate structure on the active pattern and having a gate electrode extending in a second direction intersecting the active pattern, and a gate capping pattern on the gate electrode, the gate capping pattern including a gate capping liner defining a gate capping recess, the gate capping liner having a horizontal portion along an upper surface of the gate electrode, and a vertical portion extending from the horizontal portion in a third direction intersecting the first and second directions, and a gate capping filling film on the gate capping liner and filling the gate capping recess, an epitaxial pattern on the active pattern and adjacent the gate structure, a gate contact on and connected to the gate electrode, and an active contact on and connected to the epitaxial pattern.Type: ApplicationFiled: November 2, 2021Publication date: August 11, 2022Inventors: Ju Hun PARK, Won Cheol JEONG, Jin Wook KIM, Deok Han BAE, Myung Yoon UM, In Yeal LEE, Yoon Young JUNG
-
Patent number: 11296029Abstract: A semiconductor device includes an active pattern extending in a first horizontal direction on a substrate, a gate electrode extending in a second horizontal direction across the active pattern, and including a first portion, and a second portion protruding upward from the first portion in a vertical direction, a capping pattern extending in the second horizontal direction on the gate electrode, and a gate contact disposed on the second portion of the gate electrode, overlapping the active pattern, and penetrating the capping pattern to connect the gate electrode.Type: GrantFiled: August 31, 2020Date of Patent: April 5, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Ju Youn Kim, Deok Han Bae, Jin-Wook Kim, Ju Hun Park, Myung Yoon Um, In Yeal Lee
-
Publication number: 20220077292Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising an element isolation region and an active region defined by the element isolation region, a fin-type pattern on the active region, the fin-type pattern extending in a first horizontal direction, a gate electrode on the fin-type pattern, the gate electrode extending in a second horizontal direction that crosses the first horizontal direction, a capping pattern on the gate electrode, a source/drain region on at least one side of the gate electrode, a source/drain contact on the source/drain region and electrically connected to the source/drain region, and a filling insulating layer on the source/drain contact, the filling insulating layer having a top surface at a same level as a top surface of the capping pattern, and including a material containing a carbon (C) atom.Type: ApplicationFiled: April 12, 2021Publication date: March 10, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Deok Han BAE, Sung Min KIM, Ju Hun PARK, Myung Yoon UM, Jong Mil YOUN
-
Publication number: 20220013649Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first direction on the substrate, a gate electrode extending in a second direction intersecting the first direction on the active pattern, a gate spacer extending in the second direction along side walls of the gate electrode, an interlayer insulating layer contacting side walls of the gate spacer, a trench formed on the gate electrode in the interlayer insulating layer, a first capping pattern provided along side walls of the trench, at least one side wall of the first capping pattern having an inclined profile, and a second capping pattern provided on the first capping pattern in the trench.Type: ApplicationFiled: February 25, 2021Publication date: January 13, 2022Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: In Yeal LEE, Yoon Young JUNG, Jin-Wook KIM, Deok Han BAE, Myung Yoon UM
-
Publication number: 20210280682Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes an active fin protruding upwardly from a substrate and extending in a first direction and a gate structure extending in a second direction intersecting to cross the active fin, where a first width of a lower portion of the gate structure that contacts the active fin is greater than a second width of the lower portion of the gate structure that is spaced apart from the active fin.Type: ApplicationFiled: May 25, 2021Publication date: September 9, 2021Inventors: Jung-Gun YOU, Myung-Yoon UM, Young-Joon PARK, Jeong-Hyo LEE, Ji-Yong HA, Jun-sun HWANG
-
Publication number: 20210257474Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, and a gate contact in the gate structure. The gate structure includes a gate electrode extending in a first direction and a gate capping pattern on the gate electrode. The gate contact is connected to the gate electrode. The gate electrode includes a protrusion extending along a boundary between the gate contact and the gate capping pattern.Type: ApplicationFiled: September 30, 2020Publication date: August 19, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: In Yeal LEE, Ju Youn KIM, Jin-Wook KIM, Ju Hun PARK, Deok Han BAE, Myung Yoon UM
-
Publication number: 20210233847Abstract: A semiconductor device includes an active pattern extending in a first horizontal direction on a substrate, a gate electrode extending in a second horizontal direction across the active pattern, and including a first portion, and a second portion protruding upward from the first portion in a vertical direction, a capping pattern extending in the second horizontal direction on the gate electrode, and a gate contact disposed on the second portion of the gate electrode, overlapping the active pattern, and penetrating the capping pattern to connect the gate electrode.Type: ApplicationFiled: August 31, 2020Publication date: July 29, 2021Inventors: JU YOUN KIM, DEOK HAN BAE, JIN-WOOK KIM, JU HUN PARK, MYUNG YOON UM, IN YEAL LEE
-
Patent number: 11043568Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes an active fin protruding upwardly from a substrate and extending in a first direction and a gate structure extending in a second direction intersecting to cross the active fin, where a first width of a lower portion of the gate structure that contacts the active fin is greater than a second width of the lower portion of the gate structure that is spaced apart from the active fin.Type: GrantFiled: December 14, 2018Date of Patent: June 22, 2021Inventors: Jung-Gun You, Myung-Yoon Um, Young-Joon Park, Jeong-Hyo Lee, Ji-Yong Ha, Jun-sun Hwang
-
Publication number: 20210118746Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.Type: ApplicationFiled: December 28, 2020Publication date: April 22, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Gi Gwan PARK, Jung Gun YOU, Ki Il KIM, Sug Hyun SUNG, Myung Yoon UM
-
Patent number: 10910275Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.Type: GrantFiled: October 11, 2019Date of Patent: February 2, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Gi Gwan Park, Jung Gun You, Ki Il Kim, Sug Hyun Sung, Myung Yoon Um
-
Patent number: 10868007Abstract: A semiconductor device is provided. The semiconductor device includes a field insulating film on a substrate, a first fin type pattern which is formed on the substrate and protrudes upward from an upper surface of the field insulating film, and a gate electrode which intersects with the first fin type pattern on the field insulating film and includes a first portion and a second portion, the first portion being located on one side of the first fin type pattern and including a first terminal end of the gate electrode, and the second portion being located on the other side of the first fin type pattern, wherein a height from the substrate to a lowest part of the first portion is different from a height from the substrate to a lowest part of the second portion.Type: GrantFiled: March 17, 2020Date of Patent: December 15, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jung-Gun You, Se-Wan Park, Baik-Min Sung, Myung-Yoon Um